Modifica questa pagina Puntano qui Rename Page Fold/unfold all Puntano qui Questa è una lista delle pagine che sembrano avere un collegamento alla pagina attuale. VLSI Design Laboratory Wiki Home PageWiki del Laboratorio VLSI di TorinoReference books and literatureFPGA useful referencesElectronics lectures and coursesMicroelectronic Devices and Circuits (EE105)Analog Integrated Circuits (EE140/EE240A)Introduction to Digital Integrated Circuits (EE141)Advanced Analog Integrated Circuits (EE240)Advanced Digital Integrated Circuits (EE240)Analog-Digital Interfaces in VLSI Technology (EE247)Electronic Techniques for Engineering/Introduction to Microelectronic Circuits (EE40/42/100)SystemVerilog referencesVerilog referencesVHDL referencesVLSI Design WorkBookVLSI Design WorkBook [ADVANCED TOPICS]Part II - Analog and mixed-mode IC designAdvanced analog design simulationsMonte Carlo simulations using Cadence ADE XLBad analog design practicesAnalog IC design FAQsDesign hierarchy in Cadence IC (Virtuoso)Analog IC design HowTo'sNode impedance simulationStandard layout examplesLayout (an introduction)Working with parametrized cellsPost layout simulationsBasic layout techniquesBasic layout tutorialsRunning simulations using OCEANSimulation referencesNoise analyses using CadencePower consumption evaluation in Cadence VirtuosoGetting startedDesign techniquesBasic analog design tutorialsWeb tutorials on analog IC design with CadencePart V - Data analysis and programmingData analysis and programming FAQsData analysis and programming HowTo'sPart I - Computing environmentAccounts and registrationRunning VLSI design platformsRunning Cadence IC (Virtuoso)Computing resourcesHelp and documentationComputing FAQsComputing HowTo'sBuild your own local development environmentAccessing computing resources remotelyConfiguring PuTTYStarting the X serverSetting up the computing environmentLicensed softwaresTroubleshootingUNIX/Linux basic commandsUNIX/Linux system administration referencesPart III - Digital IC designDigital IC design FAQsDigital design HowTo'sBuild a standard cell library from scratchPart VI - FPGA design and programmingGlossaryIntroduction to VLSI and EDA engineeringPart IV - Introduction to mixed-signal IC designPart VIII - Introduction to TCAD simulationsWorkBook tutorialsPart V - Physical verification (DRC/LVS/PEX)Layout verification using AssuraPhysical verification using Calibre