Part III - Digital IC design

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The third part of the WorkBook is dedicated to digital IC design

Goal (in a wonderful world): build a standard cell library from scratch with simple SPICE models, extract liberty description of standard cells, create dummy layouts and abstract up to place-and-route !!! Everything… technology-independent !!!

Static timing analysis:
http://en.m.wikipedia.org/wiki/Static_timing_analysis

Contents



Last update: Luca Pacher - Sep 10, 2013

  • vlsi/workbook/digital.txt
  • Ultima modifica: 12/06/2014 19:26
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