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Turin Office: New building - 2nd floor, room B15
Phone: +39.011.670.7434
E-mail: luca.pacher@NOSPAMto.infn.it | luca.pacher@NOSPAMunito.it
Skype: pacher_luca

CERN Office: 13-2-017
Phone: +41.22.76.72059
E-mail: Luca.Pacher@NOSPAMcern.ch
MailBox: F22910

Academic CV [PDF]

• Not a beginner, not yet a pro… (aiming to become a Cylon)
• associated to INFN, Section of Turin
• member of the CMS experiment at CERN
• member of the CERN/RD53 collaboration
• member of the Italian CHIPIX65 INFN/CSN5 collaboration

2011 - 2015
Ph.D. student in Physics and Astrophysics, XXVII cycle, University of Turin, Italy
Thesis: Development of Integrated Pixel Front-End Electronics in 65nm CMOS Technology for Extreme Rate and Radiation at HL-LHC

2009-2011
Postgraduate degree in Physics (2 years, Master of Science), University of Turin, Italy
Specialization in experimental Nuclear and Particle Physics
Thesis: LePix: Monolithic Pixel Detector for LHC Tracking Systems
Final grade: 110/110 magna cum laude

2006-2009
Undergraduate degree in Physics (3 years, Bachelor of Science), University of Turin, Italy
Thesis: Study and Characterization of a Solid State Photodetecor Based on APD
Final grade: 110/110 magna cum laude

2001-2006
Scientific Diploma, Liceo Scientifico Aldo Moro, Rivarolo Canavese (TO), Italy
Final grade: 100/100

• analog and mixed-signal full-custom IC design (Cadence IC6.1.x environment, Spectre/HSpice)
• HDL languages (VHDL, Verilog/SystemVerilog)
• digital IC design (Cadence Incisive, RTL Compiler, Encounter Digital Implementation)
• physical verification (Cadence Assura and PVS, Mentor Calibre)
• system administration (RAID/LVM, X System, TCP/IP, OpenSSH, NFS, CVS/SVN, rsync)
• CAE tools installation and maintenance
• FLEXlm-based licensing
• design kit installation and maintenance
• Web design (HTML, TWiki/DokuWiki)
• software programming (C/C++, Python, ROOT/PyROOT)
• scripting (csh/bash, batch, TCL, SKILL/OCEAN)
• FPGA programming (Xilinx ISE)
• test engineering
• technical writing
• particle physics
• silicon detectors, tracking systems

A Low-Power Low-Noise Synchronous Pixel Front-End Chain in 65 nm CMOS Technology with Local Fast ToT Encoding and Autozeroing for Extreme Rate and Radiation at HL-LHC [Abstract and summary]
IEEE NSS/MIC 2015, San Diego, CA, US

Design of a 10-bit segmented current-steering Digital-to-Analog Converter in CMOS 65nm technology for the bias of new generation readout chips in high radiation environment
https://indico.cern.ch/event/357738/session/10/contribution/18
TWEPP 2015, Lisbon

Pixel front-end with synchronous discriminator and fast charge measurement for the upgrades of HL-LHC experiments
https://indico.cern.ch/event/357738/session/10/contribution/153
TWEPP 2015, Lisbon

Radiation Tolerance of a Moderate Resistivity Substrate in a Modern CMOS Process (2013)
http://www.sciencedirect.com/science/article/pii/S0168900212011527
NIM A 718 347-349

RD Collaboration Proposal: Development of Pixel Readout Integrated Circuits for Extreme Rate and Radiation (2013)
http://cds.cern.ch/record/1553467

CMS Technical Design Report for the Pixel Detector Upgrade (2012)
https://cds.cern.ch/record/1481838

Authorship within the CMS Collaboration since Oct 2013, see Inspire

• 3rd RD53 Collaboration Meeting, CERN, Apr 22-24, 2015
• 2nd CHIPIX65 annual collaboration meeting, Bari, Dec 3-4, 2014
• 2nd RD53 Collaboration Meeting, Rutherford Appleton Laboratory (RAL), Didcot, UK, Oct 15-18, 2014
• 1st RD53 Collaboration Meeting, CERN, Apr 10-11, 2014
• International Workshop on Real time, self triggered front end electronics for multichannel detectors, Torino, Italy, Nov 27-28, 2013
• Workshop su elettronica VLSI nell'INFN, Padova, Italy, Nov 13, 2013
• Il bosone di Higgs a Stoccolma, Torino, Oct 22, 2013
• XCIX Congresso Nazionale Societa' Italiana di Fisica, Trieste, Italy, September 27, 2013 [Talk]
• ATLAS and CMS 65 nm pixel ASIC meeting, CERN, November 26-27, 2012
• Tracker Italian Workshop, Perugia, Italy, March 26-27, 2012

• Analog and Mixed Signal ASIC design Training Workshop on a 65nm CMOS process, CERN, Jan 14-16, 2015
• Introduction to Analogue and Mixed Signal IC Design, Rutherford Appleton Laboratory (RAL), Didcot, UK, Jun 30 - Jul 4, 2014
• Comprehensive Digital IC Implementation and Signoff using Cadence tools, Rutherford Appleton Laboratory (RAL), Didcot, UK, Mar 31 - Apr 5, 2014
• DATA driven FEE for time and energy measurement with highly segmented detector, Turin, Italy, Nov 25-27, 2013
• Low-Power Analog IC Design course at EPFL, Lausanne, Switzerland, Jul 1-5, 2013
• CMS Data Analysis School (DAS) Pisa, Italy, Jan 23-27, 2012

2014

• XXIV Giornate di Studio sui Rivelatori, Torino, Oct 28-31, 2014
• Introduction to Analogue and Mixed Signal IC Design, Rutherford Appleton Laboratory (RAL), Didcot, UK, Jun 30 - Jul 4, 2014
• Comprehensive Digital IC Implementation and Signoff using Cadence tools, Rutherford Appleton Laboratory (RAL), Didcot, UK, Mar 31 - Apr 5, 2014

2013

• DATA driven FEE for time and energy measurement with highly segmented detector, Torino, Nov 25-27, 2013
• XXIII Giornate di Studio sui Rivelatori, Torino, Oct 22-25, 2013
• Il bosone di Higgs a Stoccolma, Torino, Oct 22, 2013
• Low-Power Analog IC Design course at EPFL, Lausanne, Switzerland, Jul 1-5, 2013 [Final exam|Course evaluation]
• Elettronica digitale [M. Greco, 6 credits|Follow up presentation]
• Calorimetry in particle physics experiments [R. Arcidiacono, 4 credits|Follow up presentation]

2012

• Understanding the Higgs, Torino, Nov 28, 2012
• XXII Giornate di Studio sui Rivelatori, Torino, Jun ??, 2012
• Elettronica digitale [A. Grasso, 6 credits]
• Microelettronica [A. Rivetti, 6 credits]
• Mixing and CP Violation [F. Bianchi, 3 credits]
• CMS Data Analysis School (DAS) Pisa, Italy, Jan 23-27, 2012

See also Didattica .

2013/2014

• 6 ore (lezione frontale + esercitazioni con simulatore circuitale LTSpice), Esperimentazioni II (M. Chiosso)

2012/2013

• 30 ore (lezione frontale + laboratorio, esperienza LePix), Laboratorio Fisica Nucleare e Subnucleare II (M. Costa)
• 5 ore (esercitazioni con simulatore circuitale PSpice), Elettronica (E. Menichetti)
• 4 ore (lezione frontale + esercitazioni con simulatore circuitale PSpice), Esperimentazioni II (M. Chiosso)

2011/2012

• 6 ore (esercitazioni con simulatore circuitale PSpice), Microelettronica (A. Rivetti)

Last update: Jun 23, 2015