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vlsi:workbook2:sdc [05/06/2014 17:57] pacher |
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- | //Synopsys Timing Constraints and Optimization User Guide// \\ | + | Reference documentation from Synopsys: |
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+ | //Synopsys Timing Constraints and Optimization User Guide// (''tcoug.pdf'') \\ | ||
[[http://acms.ucsd.edu/_files/tcoug.pdf]] | [[http://acms.ucsd.edu/_files/tcoug.pdf]] | ||
[[http://www.synopsys.com/Community/Interoperability/Pages/TapinSDC.aspx]] | [[http://www.synopsys.com/Community/Interoperability/Pages/TapinSDC.aspx]] | ||
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+ | Documentation from Cadence: | ||
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+ | //Setting Constraints and Performing Timing Analysis Using Encounter RTL Compiler// (''rc_ta.pdf'') \\ | ||
+ | ''<install dir>/doc/rc_ta/rc_ta.pdf'' | ||
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+ | Useful external links: | ||
[[http://www.vlsi-expert.com/2011/02/synopsys-design-constraints-sdc-basics.html]] | [[http://www.vlsi-expert.com/2011/02/synopsys-design-constraints-sdc-basics.html]] |