Differenze
Queste sono le differenze tra la revisione selezionata e la versione attuale della pagina.
Entrambe le parti precedenti la revisione Revisione precedente | Prossima revisione Entrambe le parti successive la revisione | ||
vlsi:workbook2:sdc [05/06/2014 17:30] pacher |
vlsi:workbook2:sdc [05/06/2014 17:34] pacher |
||
---|---|---|---|
Linea 4: | Linea 4: | ||
[ __[[vlsi:workbook2|Back]]__ ] | [ __[[vlsi:workbook2|Back]]__ ] | ||
+ | |||
+ | |||
+ | |||
+ | //Synopsys Timing Constraints and Optimization User Guide// \\ | ||
+ | [[http://acms.ucsd.edu/_files/tcoug.pdf]] | ||
[[http://www.synopsys.com/Community/Interoperability/Pages/TapinSDC.aspx]] | [[http://www.synopsys.com/Community/Interoperability/Pages/TapinSDC.aspx]] | ||
Linea 10: | Linea 15: | ||
[[http://www.microsemi.com/document-portal/doc_download/131597-design-constraints-guide]] | [[http://www.microsemi.com/document-portal/doc_download/131597-design-constraints-guide]] | ||
- | |||
- | [[http://acms.ucsd.edu/_files/tcoug.pdf]] | ||
[[http://application-notes.digchip.com/056/56-39741.pdf]] | [[http://application-notes.digchip.com/056/56-39741.pdf]] |