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| + | ===== Analog design in very deep submicron technologies ===== | ||
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| + | References: | ||
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| + | * D. Foty, D. Binkley and M. Bucher, //Measurement and Modeling of MOSFET Inversion Level Over a Wide Range As a Basis for Analog Design// | ||
| + | * F. Silveira, D. Flandre and P. Jespers, //A gm/ID Methodology for the Design of CMOS Analog Circuits and Its Application to the Synthesis of a Silicon-on-Insulator Micropower OTA// | ||
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| + | //[[http://doc.utwente.nl/52564/|Analog Circuits in Ultra-Deep-Submicron CMOS]]// | ||
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| + | //[[http://cdsweb.cern.ch/record/1234878|Low Power Analog Design in Scaled Technologies]]// | ||
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| + | P.G. Jespers, //The gm/ID Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits// | ||
| ===== Small signal model ===== | ===== Small signal model ===== | ||