Theses opportunities

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Several master theses are offered every year by the VLSI design group. Theses may concern either the design or testing of Application Specific Integrated Circuits (ASICs) developed by the VLSI lab for one of the experiments in which the INFN Section of Turin is involved.

For more information, please contact Angelo Rivetti.



Last update: Luca Pacher - Apr 4, 2013

  • vlsi/theses/opportunities.txt
  • Ultima modifica: 02/08/2013 12:17
  • da pacher