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vlsi:workbook:digital:tmp [20/04/2014 00:01] pacher |
vlsi:workbook:digital:tmp [23/05/2014 09:43] (versione attuale) pacher |
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| ====== vlsi/workbook/digital/tmp ====== | ====== vlsi/workbook/digital/tmp ====== | ||
| + | [ __[[vlsi:workbook:digital|Back]]__ ] | ||
| ====== Cadence Incisive Verification Platform ====== | ====== Cadence Incisive Verification Platform ====== | ||
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| + | [[http://www.europractice.stfc.ac.uk/software/cadence_packages.html]] | ||
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| + | Complete tutorial from the Altera application note //Using Cadence NC Tools in a Quartus II Design Flow// \\ | ||
| + | [[http://www.altera.co.jp/literature/an/an197.pdf]] | ||
| Latest packege installed: INCISIV **13.10** | Latest packege installed: INCISIV **13.10** | ||
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| [[http://rhlug.pileus.org/wiki/Cadence_IUS]] (uses a MakeFile !!!) \\ | [[http://rhlug.pileus.org/wiki/Cadence_IUS]] (uses a MakeFile !!!) \\ | ||
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| + | ncverilog tutorials: \\ | ||
| + | [[http://mayzhao.wordpress.com/2010/07/15/ncverilog/]] | ||
| [[http://hdfpga.blogspot.it/2011/03/nc-verilog-simulator-tutorial.html]] \\ | [[http://hdfpga.blogspot.it/2011/03/nc-verilog-simulator-tutorial.html]] \\ | ||
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| + | How to run simulations with ''irun'' : \\ | ||
| [[http://www.cadence.com/Community/blogs/fv/archive/2008/12/17/demo-irun-the-way-to-run-simulations.aspx?postID=13471]] | [[http://www.cadence.com/Community/blogs/fv/archive/2008/12/17/demo-irun-the-way-to-run-simulations.aspx?postID=13471]] | ||