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--- vlsi:workbook:digital:stdcells [19/03/2014 23:56]
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+++ vlsi:workbook:digital:stdcells [25/03/2014 21:08] (versione attuale)
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@@ Linea 2: / Linea 2: @@
 ====== Build a standard cell library from scratch ======
+[ __[[vlsi:home|Home]]__ ]
+[ __[[vlsi:workbook:digital|Back]]__ ]
 [ __[[vlsi:workbook|Design WorkBook]]__ ]
@@ Linea 10: / Linea 12: @@
-References:
+References (just google for 'standard cell tutorial'):
 [[http://www.csee.umbc.edu/~cpatel2/links/641/|Advanced VLSI Design II course (by C. Patel)]]
-Textbook: \\
+Textbook:                                                         \\
-//Digital VLSI Chip Design with Cadence and Synopsys CAD Tools// by E. Brunvand  \\
+//Digital VLSI Chip Design with Cadence and Synopsys CAD Tools//  \\
+by E. Brunvand                                                    \\
 [[http://www.cs.utah.edu/~elb/cadbook/]]
+[[http://ece451web.groups.et.byu.net/cadence-help/src/tlf.pdf]]  \\
+[[http://www.ece.unm.edu/~jimp/vlsi_synthesis/contrib/MissStateStdCellTut.ppt‎]]  \\
+[[http://www.silvaco.com/products/digital_cad/cell_characterization_modeling/Cell_Char_Intro.pdf]]  \\
+[[http://www.ece.unm.edu/~jimp/vlsi_synthesis/]]   \\
+[[http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee241_s13/Assignments/lab3-stdcell.pdf]]   \\
+[[http://www.csee.umbc.edu/~cpatel2/links/641/slides/lect02_std_cells.pdf‎]]
+Everything in: [[http://www.cse.sc.edu/~jbakos/612/index.shtml]]
 ====== Liberty ======
@@ Linea 29: / Linea 42: @@
+====== Abstract generation ======
+[[http://www.cse.sc.edu/~jbakos/612/index.shtml]] \\
+[[http://www.cse.sc.edu/~jbakos/612/tutorials/scells_abstract.shtml]]
 ====== ======