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| [ __[[vlsi:home|Home]]__ ] | [ __[[vlsi:home|Home]]__ ] | ||
| - | [ __[[vlsi:workbook|VLSI Design WorkBook]]__ ] | + | [ __[[vlsi:workbook|Back]]__ ] |
| + | [ __[[vlsi:workbook|Design WorkBook]]__ ] | ||
| [ __[[vlsi:workbook:analog#contents|Contents]]__ ] | [ __[[vlsi:workbook:analog#contents|Contents]]__ ] | ||
| - | [ __[[vlsi:webtutorials|Third party tutorials]]__ ] | + | [ __[[vlsi:workbook:analog:webtutorials|Third party tutorials]]__ ] |
| - | [ __[[vlsi:books|Books]]__ ] | + | [ __[[vlsi:workbook:analog:youtube|Videos]]__ ] |
| - | [ __[[vlsi:glossary|Glossary]]__ ] | + | [ __[[vlsi:resources:books|Books]]__ ] |
| + | [ __[[vlsi:workbook:glossary|Glossary]]__ ] | ||
| [ __[[vlsi:workbook:analog:howtos|HowTo's]]__ ] | [ __[[vlsi:workbook:analog:howtos|HowTo's]]__ ] | ||
| [ __[[vlsi:workbook:analog:faqs|FAQs]]__ ] | [ __[[vlsi:workbook:analog:faqs|FAQs]]__ ] | ||
| + | [ __[[vlsi:workbook:analog:kpas|Known problems and solutions]]__ ] | ||
| \\ | \\ | ||
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| references will be included in the tutorials description. As a matter of fact we mention | references will be included in the tutorials description. As a matter of fact we mention | ||
| a few very standard layers (e.g. M1 and M2 metal layers) which are common to all technologies. | a few very standard layers (e.g. M1 and M2 metal layers) which are common to all technologies. | ||
| + | |||
| + | Layout examples with the **[[http://www.layouteditor.net/|LayoutEditor]]** open source software | ||
| extract a simple **sandwitch metal-to-metal capacitor**, which is another technology-independent example | extract a simple **sandwitch metal-to-metal capacitor**, which is another technology-independent example | ||
| + | To get started with SPICE you can refere to __[[vlsi:workbook:analog:ltspice|LTspice pages]]__ | ||
| A collection of questions abaout analog design with Cadence has been collected in form of | A collection of questions abaout analog design with Cadence has been collected in form of | ||
| Linea 32: | Linea 38: | ||
| == Contents == | == Contents == | ||
| - | * **[[vlsi:analog_start|Getting started]]** | + | * **[[vlsi:workbook:analog:start|Getting started]]** |
| * Introduction | * Introduction | ||
| * Tools overview | * Tools overview | ||
| - | * Documentation | + | * Reference documentation |
| * Setting up the UNIX evironment | * Setting up the UNIX evironment | ||
| * Running Cadence Virtuoso | * Running Cadence Virtuoso | ||
| * Quitting the session | * Quitting the session | ||
| + | |||
| + | * **[[vlsi:workbook:analog:infrastructure|Analog design infrastructure]]** | ||
| + | * Introduction | ||
| + | * Technology files, libraries, LEF/DEF etc. | ||
| * **[[vlsi:workbook:analog:hierarchy|Design hierarchy]]** | * **[[vlsi:workbook:analog:hierarchy|Design hierarchy]]** | ||
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| * Managing libraries with the Library Path Editor | * Managing libraries with the Library Path Editor | ||
| - | * **[[vlsi:analog_cdsenv|Cadence environment and setup files]]** | + | * **[[vlsi:workbook:analog:cdsenv|Cadence environment and setup files]]** |
| - | * [[vlsi:analog_cdsenv#introduction|Introduction]] | + | * [[vlsi:workbook:analog:cdsenv#introduction|Introduction]] |
| - | * [[vlsi:analog_cdsenv#reference_documentation|Reference documentation]] | + | * [[vlsi:workbook:analog:cdsenv#reference_documentation|Reference documentation]] |
| - | * [[vlsi:analog_cdsenv#sample_files|Sample files]] | + | * [[vlsi:workbook:analog:cdsenv#sample_files|Sample files]] |
| - | * [[vlsi:analog_cdsenv#.cadence_directories|.cadence directories]] | + | * [[vlsi:workbook:analog:cdsenv#.cadence_directories|.cadence directories]] |
| - | * [[vlsi:analog_cdsenv#.cdsenv_and_.cdsinit_initialization_files|.cdsenv and .cdsinit initialization files]] | + | * [[vlsi:workbook:analog:cdsenv#.cdsenv_and_.cdsinit_initialization_files|.cdsenv and .cdsinit initialization files]] |
| - | * [[vlsi:analog_cdsenv#.cdsinit_tech|.cdsinit_tech]] | + | * [[vlsi:workbook:analog:cdsenv#.cdsinit_tech|.cdsinit_tech]] |
| - | * [[vlsi:analog_cdsenv#libinit.il|libInit.il]] | + | * [[vlsi:workbook:analog:cdsenv#libinit.il|libInit.il]] |
| - | * [[vlsi:analog_cdsenv#cds.log|CDS.log]] | + | * [[vlsi:workbook:analog:cdsenv#cds.log|CDS.log]] |
| - | * [[vlsi:analog_cdsenv#.simrc|.simrc]] | + | * [[vlsi:workbook:analog:cdsenv#.simrc|.simrc]] |
| - | * [[vlsi:analog_cdsenv#.cdsplotinit|.cdsplotinit]] | + | * [[vlsi:workbook:analog:cdsenv#.cdsplotinit|.cdsplotinit]] |
| - | * [[vlsi:analog_cdsenv#cds.lib_library_definition_file|cds.lib library definition file]] | + | * [[vlsi:workbook:analog:cdsenv#cds.lib_library_definition_file|cds.lib library definition file]] |
| - | * [[vlsi:analog_cdsenv#display.drf|display.drf]] | + | * [[vlsi:workbook:analog:cdsenv#display.drf|display.drf]] |
| - | * [[vlsi:analog_cdsenv#bindkeys|Bindkeys]] | + | * [[vlsi:workbook:analog:cdsenv#bindkeys|Bindkeys]] |
| - | * [[vlsi:analog_cdsenv#some_customization_examples|Some customization examples]] | + | * [[vlsi:workbook:analog:cdsenv#some_customization_examples|Some customization examples]] |
| - | * **[[vlsi:analog_schematic_tutorials|Basic analog design tutorials]]** | + | * **[[vlsi:workbook:analog:tutorials|Basic analog design tutorials]]** |
| * Introduction | * Introduction | ||
| * Environment setup | * Environment setup | ||
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| * Tutorial 6 - ... | * Tutorial 6 - ... | ||
| * [[vlsi:analog_schematic_tutorials#third_party_video_tutorials|Third party video tutorials]] | * [[vlsi:analog_schematic_tutorials#third_party_video_tutorials|Third party video tutorials]] | ||
| + | |||
| + | * **[[vlsi:workbook:analog:schemref|Schematic-entry references]]** | ||
| + | * Introduction | ||
| + | * .... | ||
| + | * Iterated instances (vectors) | ||
| + | * ... | ||
| + | * ... | ||
| - | * **[[vlsi:analog_simref|Simulation references]]** | + | * **[[vlsi:workbook:analog:simref|Simulation references]]** |
| * [[vlsi:analog_simref#introduction|Introduction]] | * [[vlsi:analog_simref#introduction|Introduction]] | ||
| * [[vlsi:analog_simref#reference_documentation|Reference documentation]] | * [[vlsi:analog_simref#reference_documentation|Reference documentation]] | ||
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| * .... | * .... | ||
| - | * **[[vlsi:analog_techniques|Design techniques]]** | + | * **[[vlsi:workbook:analog:techniques|Design techniques]]** |
| * Introduction | * Introduction | ||
| * MOS small signal model validity | * MOS small signal model validity | ||
| Linea 97: | Linea 114: | ||
| * Some standard analog topologies | * Some standard analog topologies | ||
| - | * **[[vlsi:analog_bad|Bad analog design practices]]** | + | * **[[vlsi:workbook:analog:bad_practices|Bad analog design practices]]** |
| * Introduction | * Introduction | ||
| * ... | * ... | ||
| - | * **[[vlsi:analog_advancedsim|Advanced analog design simulations]]** | + | * **[[vlsi:workbook:analog:adexl|Advanced analog design simulations]]** |
| * Introduction | * Introduction | ||
| * Getting started with ADE XL | * Getting started with ADE XL | ||
| Linea 108: | Linea 125: | ||
| * [[vlsi:analog_advancedsim#monte_carlo_simulations|Monte Carlo simulations]] | * [[vlsi:analog_advancedsim#monte_carlo_simulations|Monte Carlo simulations]] | ||
| - | * **[[vlsi:analog_verilogA|Creating analog behavioral models with Verilog-A]]** | + | |
| + | * **[[vlsi:workbook:analog:doc|Include documentation in your designs]]** | ||
| + | * Introduction | ||
| + | * Add notes and comments to schematics | ||
| + | * Creating text cell views | ||
| + | * Include documentation in ADE XL | ||
| + | * Datasheets generation | ||
| + | * ... | ||
| + | |||
| + | * **[[vlsi:workbook:analog:ocean|Running simulations using OCEAN]]** | ||
| * Introduction | * Introduction | ||
| + | * Reference documentation | ||
| + | * ... | ||
| + | * ... | ||
| - | * **[[vlsi:analog_ocean|Running simulations using OCEAN]]** | + | * **[[vlsi:workbook:mixed|Introduction to Mixed-Signal simulation with Cadence tools]]** |
| * Introduction | * Introduction | ||
| + | * ... | ||
| + | * ... | ||
| + | |||
| - | * **[[vlsi:analog_layout_intro|Layout (an introduction)]]** | + | * **[[vlsi:workbook:analog:layout:intro|Layout (an introduction)]]** |
| * Introduction | * Introduction | ||
| * Tools overview | * Tools overview | ||
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| * The Layer Palette | * The Layer Palette | ||
| - | * **[[vlsi:analog_layout_tutorials|Basic layout tutorials]]** | + | * **[[vlsi:workbook:analog:layout:tutorials|Basic layout tutorials]]** |
| * Introduction | * Introduction | ||
| * Create a ruler | * Create a ruler | ||
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| * Create a pin | * Create a pin | ||
| - | * **[[vlsi:analog_layout_pcells|Working with parametrized cells]]** | + | * **[[vlsi:workbook:analog:layout:pcells|Working with parametrized cells]]** |
| * Introduction | * Introduction | ||
| * Substrate contacts | * Substrate contacts | ||
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| * PMOS layout | * PMOS layout | ||
| - | * **[[vlsi:analog_layout_techniques|Layout techniques]]** | + | * **[[vlsi:workbook:analog:layout:techniques|Basic layout techniques]]** |
| * Introduction | * Introduction | ||
| * Multi-finger transistors | * Multi-finger transistors | ||
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| * Latch-up | * Latch-up | ||
| - | * **[[vlsi:analog_layout_examples|Standard layout examples]]** | + | * **[[vlsi:workbook:analog:layout:examples|Standard layout examples]]** |
| * Inverter layout | * Inverter layout | ||
| * Common source amplifier | * Common source amplifier | ||
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| * Ring oscillator | * Ring oscillator | ||
| - | * **[[vlsi:analog_layout_verification|Physical verification]]** | + | * **[[vlsi:workbook:analog:layout:verification|Physical verification]]** |
| * Introduction | * Introduction | ||
| * Tools overview | * Tools overview | ||
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| * Layout-versus-Schematic (LVS) | * Layout-versus-Schematic (LVS) | ||
| - | * **[[vlsi:analog_layout_assura|Assura tutorial]]** | + | * **[[vlsi:workbook:analog:layout:assura|Assura tutorial]]** |
| * Introduction | * Introduction | ||
| * Documentation | * Documentation | ||
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| * Assura QRC | * Assura QRC | ||
| - | * **[[vlsi:analog_layout_calibre|Calibre tutorial]]** | + | * **[[vlsi:workbook:analog:layout:calibre|Calibre tutorial]]** |
| * Introduction | * Introduction | ||
| * Documentation | * Documentation | ||
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| * Calibre CRX | * Calibre CRX | ||
| - | * **[[vlsi:analog_layout_postsim|Post-Layout simulations]]** | + | * **[[vlsi:workbook:analog:layout:pex|Post-Layout simulations]]** |
| * Introduction | * Introduction | ||
| * Parasitic extraction | * Parasitic extraction | ||
| * Simulation of the extracted netlist | * Simulation of the extracted netlist | ||
| + | |||
| + | * **[[vlsi:workbook:analog:layout:tutorials:capacitor|Full example: a parallel-plates capacitor]]** | ||
| * **[[vlsi:workbook:analog:howtos|HowTo's]]** | * **[[vlsi:workbook:analog:howtos|HowTo's]]** | ||