Differenze
Queste sono le differenze tra la revisione selezionata e la versione attuale della pagina.
Entrambe le parti precedenti la revisione Revisione precedente Prossima revisione | Revisione precedente Ultima revisione Entrambe le parti successive la revisione | ||
vlsi:workbook:glossary [07/01/2014 19:21] pacher |
vlsi:workbook:glossary [13/01/2014 12:33] panati |
||
---|---|---|---|
Linea 102: | Linea 102: | ||
===== B ===== | ===== B ===== | ||
- | **BNF** - Backus-Naur Form | ||
**BEOL** - Back-End Of Line | **BEOL** - Back-End Of Line | ||
Linea 115: | Linea 114: | ||
**bit** - binary digit | **bit** - binary digit | ||
+ | |||
+ | **BJT** - Bipolar Junction Transistor | ||
**BL** - Base-Line | **BL** - Base-Line | ||
Linea 120: | Linea 121: | ||
**BLH** - Base-Line Holder | **BLH** - Base-Line Holder | ||
- | **BJT** - Bipolar Junction Transistor | + | **BNF** - Backus-Naur Form |
+ | |||
+ | **BOM** - Bill Of Material | ||
**bpi** - bits per inch (HD drive) | **bpi** - bits per inch (HD drive) | ||
Linea 130: | Linea 133: | ||
**BX** - Bunch Crossing | **BX** - Bunch Crossing | ||
- | **byte** - eight bits | + | **byte** - 8 bits (1B = 8b) |
===== C ===== | ===== C ===== | ||
Linea 179: | Linea 181: | ||
**CPC** - Charge-Pump Circuit | **CPC** - Charge-Pump Circuit | ||
- | **crumb** - two bits | + | **crumb** - 2 bits |
**CSV** - (//file ext.//) Comma-Separated Values | **CSV** - (//file ext.//) Comma-Separated Values | ||
Linea 211: | Linea 213: | ||
**dcmatch** - (//Spectre//) ???? analysis | **dcmatch** - (//Spectre//) ???? analysis | ||
- | **deckle** - ten bits | + | **deckle** - 10 bits |
**DEF** - (//Cadence//) Design-Exchange Format | **DEF** - (//Cadence//) Design-Exchange Format | ||
Linea 251: | Linea 253: | ||
**DUT** - Device Under Test | **DUT** - Device Under Test | ||
- | **Dynner** - thirty-two bits | + | **dynner** - 32 bits |
+ | |||
+ | **DUV** - Device Under Verification | ||
===== E ===== | ===== E ===== | ||
Linea 502: | Linea 507: | ||
**nfet** - NMOS transistor | **nfet** - NMOS transistor | ||
- | **nibble** - (also //nybble//) four bits | + | **nibble** - (also //nybble//) 4 bits |
- | **nickle** - five bits | + | **nickle** - 5 bits |
**NIM** - Nuclear and Instrument Methods | **NIM** - Nuclear and Instrument Methods | ||
Linea 758: | Linea 763: | ||
**tw** - triple-well transistor | **tw** - triple-well transistor | ||
- | **tydbit** - (also //tayste//) two bits | + | **tydbit** - (also //tayste//) 2 bits |
===== U ===== | ===== U ===== |