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vlsi:workbook:glossary [13/01/2014 12:33] panati |
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* [[http://www.smta.org/files/acronym_glossary.pdf|Glossary of Acronyms Relevant to Electronics Manufacturing]] | * [[http://www.smta.org/files/acronym_glossary.pdf|Glossary of Acronyms Relevant to Electronics Manufacturing]] | ||
* [[http://www.acronym-guide.com/technology-acronyms.php|Technology, Electronics & Video Game Acronyms]] | * [[http://www.acronym-guide.com/technology-acronyms.php|Technology, Electronics & Video Game Acronyms]] | ||
- | * ... | + | * [[http://www.vlsiencyclopedia.com/p/vlsi-glossary.html|VLSI Glossary (VLSI-encyclopedia)]] |
===== A ===== | ===== A ===== | ||
Linea 102: | Linea 102: | ||
===== B ===== | ===== B ===== | ||
- | **BNF** - Backus-Naur Form | ||
**BEOL** - Back-End Of Line | **BEOL** - Back-End Of Line | ||
Linea 113: | Linea 112: | ||
**BIT** - Built-In Test | **BIT** - Built-In Test | ||
+ | |||
+ | **bit** - binary digit | ||
+ | |||
+ | **BJT** - Bipolar Junction Transistor | ||
**BL** - Base-Line | **BL** - Base-Line | ||
Linea 118: | Linea 121: | ||
**BLH** - Base-Line Holder | **BLH** - Base-Line Holder | ||
- | **BJT** - Bipolar Junction Transistor | + | **BNF** - Backus-Naur Form |
+ | |||
+ | **BOM** - Bill Of Material | ||
**bpi** - bits per inch (HD drive) | **bpi** - bits per inch (HD drive) | ||
**Bpi** - byte per inch (HD drive) | **Bpi** - byte per inch (HD drive) | ||
+ | |||
+ | **BW** - Band-Width | ||
**BX** - Bunch Crossing | **BX** - Bunch Crossing | ||
- | **BW** - Band-Width | + | **byte** - 8 bits (1B = 8b) |
===== C ===== | ===== C ===== | ||
Linea 173: | Linea 180: | ||
**CPC** - Charge-Pump Circuit | **CPC** - Charge-Pump Circuit | ||
+ | |||
+ | **crumb** - 2 bits | ||
**CSV** - (//file ext.//) Comma-Separated Values | **CSV** - (//file ext.//) Comma-Separated Values | ||
**CT** - Continuous Time | **CT** - Continuous Time | ||
+ | |||
+ | **CTS** - Clock Tree Synthesis | ||
**<nowiki>CVS</nowiki>** - Concurrent Versioning System | **<nowiki>CVS</nowiki>** - Concurrent Versioning System | ||
Linea 200: | Linea 211: | ||
**dc** - (//Spectre//) DC analysis | **dc** - (//Spectre//) DC analysis | ||
- | **dcmatch** (//Spectre//) ???? analysis | + | **dcmatch** - (//Spectre//) ???? analysis |
- | **DTL** - Diode-transistor logic | + | **deckle** - 10 bits |
+ | |||
+ | **DEF** - (//Cadence//) Design-Exchange Format | ||
**DDS** - Direct Digital Synthesis | **DDS** - Direct Digital Synthesis | ||
Linea 235: | Linea 248: | ||
**DT** - Discrete Time | **DT** - Discrete Time | ||
+ | |||
+ | **DTL** - Diode-Transistor Logic | ||
**DUT** - Device Under Test | **DUT** - Device Under Test | ||
+ | |||
+ | **dynner** - 32 bits | ||
+ | |||
+ | **DUV** - Device Under Verification | ||
+ | |||
===== E ===== | ===== E ===== | ||
Linea 412: | Linea 432: | ||
**LED** - Light-Emitting Diode | **LED** - Light-Emitting Diode | ||
+ | |||
+ | **LEF** - (//Cadence//) Library Exchange Format | ||
**LET** - Linear Energy Transfer (//dE/dx// ) | **LET** - Linear Energy Transfer (//dE/dx// ) | ||
Linea 476: | Linea 498: | ||
===== N ===== | ===== N ===== | ||
+ | |||
+ | **N/A** - Not applicable (or not available) | ||
**nch** - NMOS transistor | **nch** - NMOS transistor | ||
Linea 482: | Linea 506: | ||
**nfet** - NMOS transistor | **nfet** - NMOS transistor | ||
+ | |||
+ | **nibble** - (also //nybble//) 4 bits | ||
+ | |||
+ | **nickle** - 5 bits | ||
**NIM** - Nuclear and Instrument Methods | **NIM** - Nuclear and Instrument Methods | ||
Linea 490: | Linea 518: | ||
**NTF** - Noise Transfer Function | **NTF** - Noise Transfer Function | ||
+ | |||
+ | |||
===== O ===== | ===== O ===== | ||
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**tw** - triple-well transistor | **tw** - triple-well transistor | ||
+ | |||
+ | **tydbit** - (also //tayste//) 2 bits | ||
===== U ===== | ===== U ===== |