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--- vlsi:workbook:fpga:xilinx:isim [19/11/2014 16:20]
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+++ vlsi:workbook:fpga:xilinx:isim [12/03/2015 19:58] (versione attuale)
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@@ Linea 19: / Linea 19: @@
 ====== Introduction ======
-[[http://www.xilinx.com/tools/isim.htm]]   \\
+Xilinx ISim Lite is free... Cadence Incisive isn't !!!
-[[http://www.rte.se/blog/blogg-modesty-corex/isim-hdl-simulator]] \\
-[[http://vhdlguru.blogspot.it/2010/12/tips-for-running-successful-simulation.html]]
+[[http://www.xilinx.com/tools/isim.htm]]   \\
+[[http://www.rte.se/blog/blogg-modesty-corex/isim-hdl-simulator]] (nice and complete!) \\
+[[http://vhdlguru.blogspot.it/2010/12/tips-for-running-successful-simulation.html]] \\
+[[http://www.sigasi.com/content/how-run-xilinx-isimfuse-command-line-linux]]
+ISim Lite vs Full versions: \\
+[[http://www.xilinx.com/products/design_tools/logic_design/verification/ise_simulator_faq.htm]]
 ====== Documentation ======
@@ Linea 57: / Linea 61: @@
+====== Library mapping file ======
+Example:
+<code>
+-- user libraries
+work = ./libraries/worklib
+vhdl_lib = ./libraries/vhdl_lib
+-- STD and IEEE libraries
+std = /opt/edatools/xilinx/ISE14.6/ISE/vhdl/hdp/lin/std
+ieee = /opt/edatools/xilinx/ISE14.6/ISE/vhdl/hdp/lin/ieee
+</code>
+Note that by delfault a ''xilinxisim.ini'' library mapping file is searched and loaded from
+   * ''$XILINX/vhdl/hdp/lin/xilinxisim.ini''
+   * ''./xilinxisim.ini''
+It is recommended to use the ''-initfile'' flag with ''vlogcomp/vhpcomp'' compilers or ''fuse'' elaborator and linker indeed.
 ====== Makefile ======
@@ Linea 70: / Linea 95: @@
 LIBFILE = libs.ini
-# ISim compiler/elaborator
+# compiler/elaborator
 CC = fuse
@@ Linea 76: / Linea 101: @@
 SIMEXE = $(TOP).exe
-# compiler/elaborator options
+# output waveform database
+WDB = ./results/wdb/$(TOP).wdb
+# Tcl run script
+TCLBATCH = ./scripts/run.tcl
+# compiler/elaborator options (use fuse -help for more details)
 CCFLAGS = -initfile $(LIBFILE) \
           -incremental \
@@ Linea 83: / Linea 114: @@
           -out $(SIMEXE)
+# simulation executable options
 SIMFLAGS = -gui \
-           -wdb ./results/wdb/$(TOP).wdb \
+           -wdb $(WDB) \
-           -tclbatch ./scripts/run.tcl
+           -tclbatch $(TCLBATCH)
 # useful command alias
-RM = rm
+RM = rm -f
 RMDIR = rm -rf
+# default target
+all: compile
-all:
+# compile and elaborate sources with fuse
-    	$(CC) $(CCFLAGS) work.$(TOP)
+compile:
+    	$(CC) $(CCFLAGS) $(TOP)
+# execute the simulation executable and run the simulation
 sim:
     	./$(SIMEXE) $(SIMFLAGS) &
+# delete log files, backup files etc.
 clean:
-      	@find ./ -name '*.log'    -exec $(RM) {} \;
+        @find ./ -name '*~' -exec $(RM) {} \;
-        @find ./ -name '*.cmd'    -exec $(RM) {} \;
+      	@$(RM) fuse.log fuse.xmsgs fuseRelaunch.cmd isim.log
-        @find ./ -name '*.xmsgs'  -exec $(RM) {} \;
+        @$(RM) $(WDB)
-        @find ./ -name '*~'	  -exec $(RM) {} \;
+        @$(RM) $(SIMEXE)
-        @find ./ -name '*.exe'    -exec $(RM) {} \;
         @$(RMDIR) isim/
 </code>
+\\
+A simple ''./scripts/run.tcl'' example:
-See also for example: \\
+<code>
-[[https://gist.github.com/gvillalta99/11436605]]
+# trace all top-level signals
+wave add /
-====== Run the Xilinx ISE In-Depth Tutorial ======
+# run the simulation
+run all
+# show simulation time
+show time
-<code>
-cd ~/scratch/xilinx
-mkdir projects
 </code>
+\\
+See also for example: \\
+[[https://gist.github.com/gvillalta99/11436605]]
-<code>
-cd ~/scratch/xilinx/projects
-ise &
-</code>