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--- vlsi:workbook:fpga:xilinx:isim [19/11/2014 16:16]
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+++ vlsi:workbook:fpga:xilinx:isim [19/11/2014 21:26]
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@@ Linea 19: / Linea 19: @@
 ====== Introduction ======
-[[http://www.xilinx.com/tools/isim.htm]]   \\
+Xilinx ISim Lite is free... Cadence Incisive isn't !!!
-[[http://www.rte.se/blog/blogg-modesty-corex/isim-hdl-simulator]] \\
-[[http://vhdlguru.blogspot.it/2010/12/tips-for-running-successful-simulation.html]]
+[[http://www.xilinx.com/tools/isim.htm]]   \\
+[[http://www.rte.se/blog/blogg-modesty-corex/isim-hdl-simulator]] (nice and complete!) \\
+[[http://vhdlguru.blogspot.it/2010/12/tips-for-running-successful-simulation.html]] \\
+[[http://www.sigasi.com/content/how-run-xilinx-isimfuse-command-line-linux]]
+ISim Lite vs Full versions: \\
+[[http://www.xilinx.com/products/design_tools/logic_design/verification/ise_simulator_faq.htm]]
 ====== Documentation ======
@@ Linea 55: / Linea 59: @@
 </code>
-====== Run the Xilinx ISE In-Depth Tutorial ======
+====== Library mapping file ======
+Example:
 <code>
-cd ~/scratch/xilinx
+-- user libraries
-mkdir projects
+work = ./libraries/worklib
+vhdl_lib = ./libraries/vhdl_lib
+-- STD and IEEE libraries
+std = /opt/edatools/xilinx/ISE14.6/ISE/vhdl/hdp/lin/std
+ieee = /opt/edatools/xilinx/ISE14.6/ISE/vhdl/hdp/lin/ieee
 </code>
+Note that by delfault a ''xilinxisim.ini'' library mapping file is searched and loaded from
+   * ''$XILINX/vhdl/hdp/lin/xilinxisim.ini''
+   * ''./xilinxisim.ini''
+It is recommended to use the ''-initfile'' flag with ''vlogcomp/vhpcomp'' compilers or ''fuse'' elaborator and linker indeed.
+====== Makefile ======
 <code>
-cd ~/scratch/xilinx/projects
+# HDL sources (project file)
-ise &
+SOURCES = design.prj
+# top-level design unit (testbench)
+TOP = tb_design
+# local library mapping file
+LIBFILE = libs.ini
+# compiler/elaborator
+CC = fuse
+# output simulation executable
+SIMEXE = $(TOP).exe
+# output waveform database
+WDB = ./results/wdb/$(TOP).wdb
+# Tcl run script
+TCLBATCH = ./scripts/run.tcl
+# compiler/elaborator options (use fule -help for more details)
+CCFLAGS = -initfile $(LIBFILE) \
+          -incremental \
+          -verbose 0 \
+          -prj $(SOURCES) \
+          -out $(SIMEXE)
+# simulation executable options
+SIMFLAGS = -gui \
+           -wdb $(WDB) \
+           -tclbatch $(TCLBATCH)
+# useful command alias
+RM = rm -f
+RMDIR = rm -rf
+# default target
+all: compile
+# compile and elaborate sources with fuse
+compile:
+    	$(CC) $(CCFLAGS) $(TOP)
+# execute the simulation executable and run the simulation
+sim:
+    	./$(SIMEXE) $(SIMFLAGS) &
+# delete log files, backup files etc.
+clean:
+        @find ./ -name '*~' -exec $(RM) {} \;
+      	@$(RM) fuse.log fuse.xmsgs fuseRelaunch.cmd isim.log
+        @$(RM) $(WDB)
+        @$(RM) $(SIMEXE)
+        @$(RMDIR) isim/
 </code>
+\\
+A simple ''./scripts/run.tcl'' example:
+<code>
+# trace all top-level signals
+wave add /
+# run the simulation
+run all
+# show simulation time
+show time
+</code>
+\\
+See also for example: \\
+[[https://gist.github.com/gvillalta99/11436605]]