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--- vlsi:theses:archive:master [22/12/2017 15:16]
pacher [A.A. 2013/2014]
+++ vlsi:theses:archive:master [24/08/2018 21:09] (versione attuale)
pacher [A.A. 2015/2016]
@@ Linea 6: / Linea 6: @@
 [ __[[http://www.infn.it/thesis]]__ ]
+====== A.A. 2017/2018 ======
 ====== A.A. 2016/2017 ======
+//**Lorenzo Piccolo**//   \\
+//Analog Front-end Design in Deep Sub-micron CMOS Technology for Timing application in Pixel Detectors//
+**{{:vlsi:theses:archive:master:lorenzo_piccolo_master_thesis.pdf|[PDF]}}**\\
+Final defense presentation: **{{:vlsi:theses:archive:master:lorenzo_piccolo_defense.pdf|[PDF]}}**\\
+Supervisor: __A. Rivetti__
+//**Raffaele Aron Giampaolo**//.  \\
+//Cryogenic CMOS Front-End for Dark Matter Detection Research and Development// \\
+Final defence presentation: **{{:vlsi:theses:archive:master:defense:aron_giampaolo_defense.pdf|[PDF]}}**\\
+Supervisor: __A. Rivetti__
 //**Andrea Di Salvo**//   \\
 //Modelling, implementation and self-calibration methods for a 12-bit SAR ADC//
 **{{:vlsi:theses:archive:master:andrea_disalvo_master_thesis.pdf|[PDF]}}**\\
-Supervisor: __A. Rivetti__,
+Final defence presentation: **FIXME** \\
+Supervisor: __A. Rivetti__
 ====== A.A. 2015/2016 ======
+//**Cecilia Giovinazzo**//   \\
+//Study of an FPGA interface for a serial communication link at high speed//
+**{{ :vlsi:theses:archive:master:cecilia_giovinazzo_master_thesis.pdf|[PDF]}}** \\
+Final defense presentation: **FIXME**   \\
+Supervisors: __M. Greco__, P. De Remigis \\
 ====== A.A. 2014/2015 ======
@@ Linea 29: / Linea 49: @@
 Supervisors: __A. Solano__, N. Cartiglia
-{{ :vlsi:theses:archive:master:luca_pacher_master_thesis.pdf}}
 ====== A.A. 2012/2013 ======
@@ Linea 50: / Linea 67: @@
-//**Fabio Ravera**//  (within the Torino 3D/UFSD sensors group)\\
-//Characterization and performance of 3D silicon pixel detectors for <nowiki>CMS</nowiki>//
-**[[http://www.to.infn.it/cms-docs/FabioRavera_TesiMagistrale.pdf|[PDF] ]]** \\
-Supervisor: __A. Solano__, M.M. Obertino