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vlsi:resources:vhdl [05/11/2014 20:29] (versione attuale) pacher |
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====== VHDL references ====== | ====== VHDL references ====== | ||
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[ __[[vlsi:workbook|Design WorkBook]]__ ] | [ __[[vlsi:workbook|Design WorkBook]]__ ] | ||
[ __[[vlsi:resources:books|Books]]__ ] | [ __[[vlsi:resources:books|Books]]__ ] | ||
- | |||
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References to documentation, books, online courses, training solutions etc.. | References to documentation, books, online courses, training solutions etc.. | ||
+ | ====== Literature ====== | ||
+ | IEEE Standards: | ||
- | ====== Literature ====== | + | * [[http://standards.ieee.org/downloads/1076/]] |
- | + | ||
- | IEEE Standards: [[http://standards.ieee.org//downloads/1076/]] | + | |
* IEEE std. 1076-1987 | * IEEE std. 1076-1987 | ||
- | * IEEE std. 1076-1993 | + | * IEEE std. 1076-1993 |
* IEEE std. 1076-2002 | * IEEE std. 1076-2002 | ||
- | * IEEE std. 1076-2008 | + | * IEEE std. 1076-2008 |
Books: | Books: | ||
* P.J. Ashenden 1990, //The VDHL Cookbook// [[http://esd.cs.ucr.edu/vhdlcook/]] | * P.J. Ashenden 1990, //The VDHL Cookbook// [[http://esd.cs.ucr.edu/vhdlcook/]] | ||
- | * P.J. Andersen, Morgan Kaufman Publisher, //The Designer's guide to VHDL// | + | * P.J. Andersen, Morgan Kaufman Publisher, //The Designer's guide to VHDL// |
* R. Dueck, //Digital Design With CPLD Applications and VHDL// [x] | * R. Dueck, //Digital Design With CPLD Applications and VHDL// [x] | ||
- | * V.A. Pedroni, //Circuit Design With VHDL// [x] | + | * V.A. Pedroni, //Circuit Design With VHDL// [x] |
- | * M. Zwolinski, //Digital System Design With VHDL// [x] | + | * M. Zwolinski, //Digital System Design With VHDL// [x] |
- | * C.H. Roth, //Digital Systems Design Using VHDL// [x] | + | * C.H. Roth, //Digital Systems Design Using VHDL// [x] |
- | * K.C. Chang, //Digital Systems Design With VHDL and Synthesis// [x] | + | * K.C. Chang, //Digital Systems Design With VHDL and Synthesis// [x] |
+ | * B. Mealy and F. Tappero, //Free Range VHDL// [[http://www.freerangefactory.org/]] | ||
* S. Brown, Z. Vranesic, //Fundamentals of Digital Logic With VHDL Design// [x] | * S. Brown, Z. Vranesic, //Fundamentals of Digital Logic With VHDL Design// [x] | ||
- | * P.P. Chu, //RTL Hardware Design Using VHDL// [x] | + | * P.P. Chu, //RTL Hardware Design Using VHDL// [x] |
+ | * F. Vahid and R. Lysecky 2007, //VHDL for Digital Design// | ||
* HARDI Electronics publisher, //VHDL Handbook// [x] | * HARDI Electronics publisher, //VHDL Handbook// [x] | ||
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- | YouTube lectures (playlists): | ||
+ | ====== Coding resources ====== | ||
+ | [[http://www.vhdl.org/]] \\ | ||
+ | [[http://www.opencores.org/]] | ||
- | ====== Other online training solutions (priced) ====== | + | ======= Lecture notes (Italian) ====== |
+ | //Introduzione al linguaggio VHDL// \\ | ||
+ | //Aspetti teorici ed esempi di progettazione// (C. Brandolese, Politecnico di Milano)\\ | ||
+ | [[http://www.fabiopanozzo.it/download/Reti_logiche/VHDL%20%28Dispensa%20a%20cura%20di%20Carlo%20Brandolese%29.pdf]] | ||
- | ====== Coding resources ====== | + | Corso: //Architetture degli elaboratori - VHDL// (S. Ferrari, Università di Milano) \\ |
+ | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/]] | ||
- | [[http://www.vhdl.org/]] \\ | + | Dispense del corso: \\ |
- | [[http://www.opencores.org/]] | + | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/disp_VHDL_2006_07.pdf]] |
+ | |||
+ | Slides del corso: \\ | ||
+ | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/lez0_2006_07_lucidi_doppio.pdf]] \\ | ||
+ | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/lez1_2006_07_lucidi_doppio.pdf]] \\ | ||
+ | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/lez2_2006_07_lucidi_doppio.pdf]] \\ | ||
+ | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/lez3_2006_07_lucidi_doppio.pdf]] \\ | ||
+ | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/lez4_2006_07_lucidi_doppio.pdf]] \\ | ||
+ | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/lez5_2006_07_lucidi_doppio.pdf]] \\ | ||
+ | [[http://homes.di.unimi.it/ferrari/ArchReti2006_07/lez6_2006_07_lucidi_doppio.pdf]] | ||
- | ======= Lecture notes ====== | ||
[[http://www.uniroma2.it/didattica/lai//deposito/]] \\ | [[http://www.uniroma2.it/didattica/lai//deposito/]] \\ | ||
- | |||
[[http://www.uniroma2.it/didattica/lai//deposito/VHDL-1.pdf]] \\ | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-1.pdf]] \\ | ||
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-2.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-2.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL_3.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL_3.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL_4.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL_4.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-6.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-6.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-7.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-7.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-8.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-8.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-9.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-9.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-10.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-10.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-11.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-11.pdf]] \\ |
- | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-12.pdf]] \\ | + | [[http://www.uniroma2.it/didattica/lai//deposito/VHDL-12.pdf]] \\ |
+ | ====== ====== | ||
+ | \\ | ||
+ | ----- | ||
+ | Last update: [[pacher@to.infn.it|Luca Pacher]] - Jun 5, 2014 | ||
+ | ~~NOTOC~~ |