Differenze
Queste sono le differenze tra la revisione selezionata e la versione attuale della pagina.
| Entrambe le parti precedenti la revisione Revisione precedente Prossima revisione | Revisione precedente | ||
|
vlsi:resources:lectures:berkeley:ee141 [28/07/2014 04:53] pacher |
vlsi:resources:lectures:berkeley:ee141 [03/02/2015 16:35] (versione attuale) pacher |
||
|---|---|---|---|
| Linea 73: | Linea 73: | ||
| * [[http://m.youtube.com/watch?v=4H5H9i3kylc|Lecture 22 - Full adder design (contd.), multipliers]] | * [[http://m.youtube.com/watch?v=4H5H9i3kylc|Lecture 22 - Full adder design (contd.), multipliers]] | ||
| * [[http://m.youtube.com/watch?v=BT9i98jquxk|Lecture 23 - Domino logic]] | * [[http://m.youtube.com/watch?v=BT9i98jquxk|Lecture 23 - Domino logic]] | ||
| - | * [[http://m.youtube.com/watch?v=IhqE7SSsSSE|Lecture 24 - Domino logic (conyd.), introduction to sequential circuits, latches and FlipFlops, setup/hold time]] | + | * [[http://m.youtube.com/watch?v=IhqE7SSsSSE|Lecture 24 - Domino logic (contd.), introduction to sequential circuits, latches and FlipFlops, setup/hold time]] |
| - | * [[http://m.youtube.com/watch?v=FMNP85VrwDULecture 25 - Layout parasitics, C2MOS latches and FlipFlops, three-state latches and FlipFlops, timing and clock modelling dor synchronous design]] | + | * [[http://m.youtube.com/watch?v=FMNP85VrwDU|Lecture 25 - Layout parasitics, C2MOS latches and FlipFlops, three-state latches and FlipFlops, timing and clock modelling for synchronous design]] |
| + | * [[http://m.youtube.com/watch?v=_HQasaV-Tp4|Lecture 26 - Timimg and clock modelling for synchronous design (contd.), clock distribution]] | ||
| + | * [[http://m.youtube.com/watch?v=QEsarUd6P5o|Lecture 27 - Clock distribution (contd.), chip packaging, ESD protection, I/O PADs, IR drops, electromigration, power distribution, ROM cells]] | ||
| + | |||
| Linea 85: | Linea 89: | ||
| ---- | ---- | ||
| - | Last update: | + | Last update: [[pacher@to.infn.it|Luca Pacher]] - Jul 28, 2014 |
| ~~NOTOC~~ | ~~NOTOC~~ | ||