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vlsi:resources:lectures:berkeley:ee141 [28/07/2014 05:04]
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vlsi:resources:lectures:berkeley:ee141 [28/07/2014 05:13]
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    * [[http://​m.youtube.com/​watch?​v=FMNP85VrwDU|Lecture 25 - Layout parasitics, C2MOS latches and FlipFlops, three-state latches and FlipFlops, timing and clock modelling for synchronous design]]    * [[http://​m.youtube.com/​watch?​v=FMNP85VrwDU|Lecture 25 - Layout parasitics, C2MOS latches and FlipFlops, three-state latches and FlipFlops, timing and clock modelling for synchronous design]]
    * [[http://​m.youtube.com/​watch?​v=_HQasaV-Tp4|Lecture 26 - Timimg and clock modelling for synchronous design (contd.), clock distribution]]    * [[http://​m.youtube.com/​watch?​v=_HQasaV-Tp4|Lecture 26 - Timimg and clock modelling for synchronous design (contd.), clock distribution]]
-   * [[http://​m.youtube.com/​watch?​v=QEsarUd6P5o|Lecture 27 - Clock distribution (contd.), I/O design]]+   * [[http://​m.youtube.com/​watch?​v=QEsarUd6P5o|Lecture 27 - Clock distribution (contd.), chip packaging, ESD protection, I/O PADs, IR drops, electromigration,​ power distribution,​ ROM cells]]
  
  
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-Last update: ​+Last update: ​[[pacher@to.infn.it|Luca Pacher]] - Jul 28, 2014
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