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-====== Glossary ====== 
- 
-[ __[[vlsi:​home|Home]]__ ] 
-[ __[[vlsi:​workbook|Design WorkBook]]__ ] 
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-====== ====== 
- 
-\\ 
-The following glossary is a reference document for information and explanations of acronyms and common ​ 
-terms related to VLSI IC design and Cadence softwares. 
-Be aware that this page is continuously being updated with new acronyms and improved definitions and concepts. 
- 
-===== A ===== 
- 
-**AC** - Alternating Current 
- 
-**ac** - (//​Spectre//​) AC analysis 
- 
-**ADC** - Analog-to-Digital Converter 
- 
-**ADE** - (//​Virtuoso//​) Analog Design Environment 
- 
-**aka** - short for //also known as// 
- 
-**ALICE** - (//CERN//) A Large Ion Collider Experiment 
- 
-**AMS** - (//​vendor//​) [[ http://​www.ams.com | American MicroSemiconductors]] (ex. Austria Micro Systems) ​ 
- 
-**APS** - (//​Spectre//​) Accelerated Parallel Simulator 
- 
-**ASIC** - Application Specific Integrated Circuit 
- 
-**Assura** - //​Cadence//'​s layout verification tool 
- 
-===== B ===== 
- 
-**BX** - Bunch Crossing 
- 
-**BW** - Band-Width 
- 
-===== C ===== 
- 
-**CAD** - Computer Aided Design 
- 
-**Calibre** - //Mentor Graphics//'​s layout verification tool 
- 
-**CDK** - Cadence Design Kit 
- 
-**CCCS** - Current Controlled Current Source 
- 
-**CCVS** - Current Controlled Voltage Source 
- 
-**CDE** - Common Desktop Environment 
- 
-**CDF** - (//​Cadence//​) Component Description Format 
- 
-**CFD** - Constant Fraction Discriminator 
- 
-**CIW** - (//​Cadence//​) Command Interpreter Window 
- 
-**CLM** - Channel Length Modulation (MOS short channel effect) 
- 
-**CM** - Common Mode 
- 
-**CMFB** - Common Mode Feedback 
- 
-**CMOS** - Complementary MOS 
- 
-**CMRR** - Common Mode Rejection Ratio 
- 
-**<​nowiki>​CMS</​nowiki>​** - (//CERN//) Compact Muon Solenoid experiment 
- 
-**corner** - a combination of variables and parameters that defines a best/worst case scenario 
- 
-**CSV** - (//file ext.//) Comma-Separated Values 
- 
-**<​nowiki>​CVS</​nowiki>​** - Concurrent Versioning System 
- 
-**C2MOS** - Clocked CMOS 
- 
-===== D ===== 
- 
-**DAC** - Digital-to-Analog Converter 
- 
-**DAQ** - Data Acquisition 
- 
-**DB** - DataBase 
- 
-**dB** - (//unit//) decibel 
- 
-**DC** - Direct Current 
- 
-**DC-OP** - DC Operating Point 
- 
-**dc** - (//​Spectre//​) DC analysis 
- 
-**dcmatch** (//​Spectre//​) ???? analysis 
- 
-**DFF** - Delay Flip-Flop 
- 
-**DFII** - (//​Cadence//​) Design Framework II 
- 
-**DIBL** - Drain Induces Barrier Lowering (MOS short channel effect) 
- 
-**Diva** - //​Cadence//'​s layout verification tool 
- 
-**DNL** - Differential Non-Linearity 
- 
-**DRAM** - Dynamic RAM (Random Access Memory) 
- 
-**DRC** - Design Rule Check 
- 
-**DRM** - Design Rules Manual 
- 
-===== E ===== 
- 
-**EDA** - Electronic Design Automation 
- 
-**EDI** - (//​Cadence//​) Encounter Digital Implementation 
- 
-**EDP** - Energy-Delay Product 
- 
-**ENC** - Equivalent Noise Charge 
- 
-**Encounter** - (//​Cadence//​) Place & Route tool 
- 
-**ENOB** - Effective Number Of Bits 
- 
-**envlp** - (//​Spectre//​) envelope analysis 
- 
-**EP** - (//​fabrication service provider//) [[ http://​www.europractice.com | Euro Practice]] 
- 
-**ERC** - Electrical Rule Check 
- 
-**ESD** - Electrostatic Discharge 
- 
-===== F ===== 
- 
-**FET** - Filed Effect Transistor 
- 
-**FDK** - Foundry Design Kit 
- 
-**FF** - Flip-Flop 
- 
-**FF** - (//​corner//​) Fast NMOS, Fast PMOS 
- 
-**FIFO** - First In First Out 
- 
-**FOM** - Figure Of Merit 
- 
-**FOX** - (//CMOS process//) Field-Oxide 
- 
-**FPGA** - Field Programmable Gate Array 
- 
-**FS** - (//​corner//​) Fast NMOS, Slow PMOS 
- 
-**FFT** - (//DFT algorithm//​) Fast Fourier Transform 
- 
-===== G ===== 
- 
-**GBW** - [[ http://​en.wikipedia.org/​wiki/​Gain–bandwidth_product | Gain-Banwidth product ]] 
- 
-**GBP** - same as **GBW** 
- 
-**GBWP** - same as **GBW** 
- 
-**GDSII** - (//file ext.//) [[ http://​en.wikipedia.org/​wiki/​GDSII | Graphic Database System II ]] 
- 
-**<​nowiki>​GUI</​nowiki>​** - Graphical User Interface 
- 
-===== H ===== 
- 
-**Hercule** - //​Synopsys//'​s layout verification tool  
- 
-**HDL** - Hardware Description Language 
- 
-**HEP** - High Energy Physics 
- 
-**HF** - (//​Cadence//​) Hot Fix 
- 
-**HSPICE** - //Mentor Graphics//'​s circuit simulator 
- 
-**HV** - High Voltage 
- 
-**hvt** - High Vth transistor 
- 
-**HW** - Hardware 
- 
-===== I ===== 
- 
-**IBM** - (//​vendor//​) [[ http://​www.ibm.com | International Business Machines Corporation]] 
- 
-**IC** - Integrated Circuit 
- 
-**IC** - (//​MOSFET//​) Inversion Coefficient 
- 
-**icfb** - (//​Cadence//​) IC Front-to-Back 
- 
-**ICMR** - Input Common-Mode Range 
- 
-**I/O** - Input/​Output 
- 
-**IOS** - Input Offset Storage (//offset cancellation technique//​) 
- 
-**INL** - Integrated Non-Linearity 
- 
-===== J ===== 
- 
-===== K ===== 
- 
-**KCL** - Kirchoff'​s Current Law 
- 
-**KVL** - Kirchoff'​s Voltage Law 
- 
-===== L ===== 
- 
-**LDO** - Low Drop-Out voltage regulator 
- 
-**LET** - Linear Energy Transfer (//dE/dx// )  
- 
-**LHS** - Latin Hypercube Sampling (MC algorithm) 
- 
-**LM** - (//​Cadence//​) Library Manager 
- 
-**LNA** - Low-Noise Amplifier 
- 
-**LOCOS** - (//​process//​) Local Oxidation of Silicon 
- 
-**LP** - Low-Power 
- 
-**LVDS** - Low-Voltage Differential Signaling 
- 
-**LV** - Low Voltage 
- 
-**LVS** - Layout Versus Schematic check 
- 
-**lvt** - Low Vth transistor 
- 
-**LSB** - Least Significant Bit 
- 
-**LSW** - (//​layout//​) Layer Selection Window 
- 
-===== M ===== 
- 
-**MC** - Monte Carlo 
- 
-**metal stack** - number of metal layers available for the electrical interconnections 
- 
-**MIM** - Metal-Insulator-Metal capacitor 
- 
-**MIP** - Minimum Ionizing Particle 
- 
-**MOM** - Metal-Oxide-Metal capacitor 
- 
-**MOSIS** - (//​fabrication service provider//) [[http://​www.mosis.com | Metal Oxide Silicon Implementation Service]] 
- 
-**MOSFET** - Metal-Oxide-Semiconductor Field Effect Transistor 
- 
-**MMSIM** - (//​Cadence//​) Multi-Mode Simulation 
- 
-**MPC** - Multi-Project Chip 
- 
-**MPW** - Multi-Project Wafer 
- 
-**MSB** - Most Significant Bit 
- 
-**MUX** - Multiplexer 
- 
-**MVA** - Multivariate Analysis ​ 
- 
-===== N ===== 
- 
-**nch** - NMOS transistor 
- 
-**NDA** - Non-Disclosure Agreement 
- 
-**nfet** - NMOS transistor 
- 
-**NIM** - Nuclear and Instrument Methods 
- 
-**noise** - (//​Spectre//​) noise analysis 
- 
-===== O ===== 
- 
-**OCEAN** - (//​Cadence//​) Open Command Environment for Analysis 
- 
-**OOS** - Output Offset Storage (//offset cancellation technique//​) 
- 
-**OP-AMP** - [[ http://​en.wikipedia.org/​wiki/​Operational_amplifier | Operational Amplifier ]] 
- 
-**<​nowiki>​OS</​nowiki>​** - Operating System 
- 
-**<​nowiki>​OSS</​nowiki>​** - (//​Cadence//​) Open Simulation System 
- 
-**OTA** - Operational Transconductance Amplifier 
- 
-===== P ===== 
- 
-**pac** - (//​Spectre//​) periodic AC analysis 
- 
-**PCB** - Printed Circuit Board 
- 
-**PDP** - Power-Delay Product 
- 
-**pch** - PMOS transistor 
- 
-**<​nowiki>​PDF</​nowiki>​** - Probability Density Function 
- 
-**PDK** - [[ http://​en.wikipedia.org/​wiki/​Process_design_kit | Process Design Kit ]] 
- 
-**pfet** - PMOS transistor 
- 
-**PLL** Phase-Locked Loop circuit 
- 
-**PM** - Phase Margin 
- 
-**pnoise** - (//​Spectre//​) periodic noise analysis 
- 
-**PSD** - Power Spectrum Density 
- 
-**PSF** - (//​Cadence//​) Parameter Storage Format 
- 
-**PSI** - [[ http://​www.psi.ch | Paul Sherrer Institute ​ ]] 
- 
-**psp** - (//​Spectre//​) periodic [[ http://​en.wikipedia.org/​wiki/​Scattering_parameters | S-parameters]] (Scattering) analysis 
- 
-**PSRR** - Power Supply Rejection Ratio 
- 
-**pss** - (//​Spectre//​) periodic steady-state analysis 
- 
-**pstb** - (//​Spectre//​) periodic ????? analysis 
- 
-**PTAT** - Proportional To Absolute Temperature 
- 
-**PU** - Pile-Up 
- 
-**PUC** - Pixel Unit Cell 
- 
-**PVT** - Process, Voltage and Temperature variations 
- 
-**pxf** - (//​Spectre//​) periodic transfer function analysis 
- 
-**pz** - (//​Spectre//​) pole-zero analysis 
- 
- 
- 
-===== Q ===== 
- 
-**qpac** - (//​Spectre//​) quasi-periodic AC analysis 
- 
-**qpnoise** - (//​Spectre//​) quasi-periodic noise analysis 
- 
-**qpss** - (//​Spectre//​) quasi-periodic steady-state analysis 
- 
-**qpsp** - (//​Spectre//​) quasi-periodic S-parameters (Scattering) analysis 
- 
-**qpxf** - (//​Spectre//​) quasi-periodic transfer function analysis 
- 
-===== R ===== 
- 
-**RC** - (//​Cadence//​) RTL Compiler, digital syntesis tool 
- 
-**//R & D//** - Research and Development 
- 
-**RHEL** - Red Hat Enterprise Linux 
- 
-**ROC** - Read-Out Chip 
- 
-**ROI** - Region Of Interest ​ 
- 
-**RF** - Radio Frequency 
- 
-**RMS** - Root Mean Square 
- 
-**RSF** - (//Cadence Assura//) Run-Specific File 
- 
-**RTL** - Register Transfer Level 
- 
-**RVE** - (//​Calibre//​) Results Viewing Environment 
- 
-===== S ===== 
- 
-**SCEs** - Short Channel Effects 
- 
-**SE** - (//​Cadence//​) Schematic Editor 
- 
-**sens** - (//​Spectre//​) sensitivity analysis 
- 
-**SEU** - Single Event Upset 
- 
-**SF** - (//​corner//​) Slow NMOS, Fast PMOS 
- 
-**SFDR** - Spurious Free Dynamic Range 
- 
-**SKILL** - //​Cadence//'​s scripting language 
- 
-**SL** - Scientific Linux 
- 
-**SLC** - Scientific Linux Cern 
- 
-**SNR** - Signal-to-Noise Ratio 
- 
-**SNDR** - Signal to Noise and Distortion Ratio 
- 
-**SoC** - System on Chip 
- 
-**SOI** - (//​process//​) Silicon On Insulator 
- 
-**sp** - (//​Spectre//​) [[ http://​en.wikipedia.org/​wiki/​Scattering_parameters | S-parameters ]] (Scattering) analysis 
- 
-**SPB** - (//​Cadence//​) Silicon Package Board, PCB design tool 
- 
-**Spectre** - //​Cadence//'​s circuit simulator 
- 
-**SPICE** - [[ http://​en.wikipedia.org/​wiki/​SPICE | Simulation Program with Integrated Circuits Emphasis ]] 
- 
-**SR** - (//​amplifier//​) [[ http://​en.wikipedia.org/​wiki/​Slew_rate | Slew Rate ]] 
- 
-**SRAM** - Static RAM (Random Access Memory) 
- 
-**SS** - (//​corner//​) Slow NMOS, Slow PMOS 
- 
-**stb** - (//​Spectre//​) ???? analysis 
- 
-**STI** - (//​process//​) Shallow Trench Isolation ​ 
- 
-**SVRF** - (//​Calibre//​) Standard Verification Rule Format 
- 
-**SW** - Software 
- 
-===== T ===== 
- 
- 
-**TBD** - To Be Determined 
- 
-**TCL** - (//​scripting language//) Tool Command Language 
- 
-**TDC** - Time-to-Digital Converter 
- 
-**TOT** - Time-Over-Threshold 
- 
-**TG** - Transmission Gate 
- 
-**TID** - Total Ionizing Dose (Total Irradiated Dose) 
- 
-**tran** - transient analysis 
- 
-**TSMC** - (//​vendor//​) [[ http://​www.tsmc.com | Taiwan Semiconductor Manufacturing Company]] 
- 
-**TT** - (//​corner//​) Typical NMOS, Typical PMOS 
- 
-**TVF** - (//​Calibre//​) TCL Verification Format 
- 
-**tw** - triple-well transistor 
- 
-===== U ===== 
- 
-**ULP** - Ultra Low-Power 
- 
-**UMC** - (//​vendor//​) [[ http://​www.umc.com | United Microelectronics Corporation]] 
- 
-===== V ===== 
- 
-**VCCS** - Voltage-Controlled Current Source 
- 
-**VCO** - Voltage-Controlled Oscillator 
- 
-**VCVS** - Voltage-Controlled Voltage Source 
- 
-**VHDL** - VHSIC Hardware Description Language 
- 
-**VHSIC** - Very High Speed Integrated Circuits 
- 
-**ViVA** - (//​Cadence//​) Virtuoso Visualization and Analysis 
- 
-**VLSI** - Very Large Scale Integration 
- 
-**VTC** - Voltage Transfer Characteristic 
- 
-===== W ===== 
- 
-**wrt** - short for //with reference to// 
- 
-===== X ===== 
- 
-**xf** - (//​Spectre//​) transfer function analysis 
- 
-===== Y ===== 
- 
-===== Z ===== 
- 
-**ZDC** - Zero Degree Calorimeter 
- 
- 
-====== ====== 
- 
-\\ 
----- 
- 
-Last update: [[pacher@NOSPAMto.infn.it|Luca Pacher]] - July 11, 2013  
- 
-~~NOTOC~~