====== Design finishing and signoff analyses ======

[ __[[vlsi:workbook2|Back]]__ ]


== Contents ==

   * Introduction 
   * Signoff logical equivalence checking (Conformal)
   * Signoff STA (Encounter Timing System)
   * Signoff power analysis (Encounter Power System)
   * ATPG (Encounter Test)

**Keywords:** Signoff tool



A complete tutorial using TSMC 65nm: \\
[[http://www.mics.ece.vt.edu/ICDesign/Tutorials/DigitalDesignFlow/signoff.html]]

====== Introduction ======

====== Signoff logical equivalence checking (Conformal) ======

====== Signoff STA (Encounter Timing System) ======

====== Signoff power analysis (Encounter Power System) ======

====== ATPG (Encounter Test) ======



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