====== VLSI Design WorkBook [ADVANCED TOPICS] ====== [ __[[vlsi:home|Home]]__ ] [ __[[vlsi:workbook|Design WorkBook]]__ ] [ __[[vlsi:private:technologies|Technologies (protected)]]__ ] [ __[[vlsi:private:home|Private area]]__ ] \\ At present, just a random list of pages about advanced topics... * [[vlsi:workbook2:skill|SKILL programming]] * [[vlsi:workbook2:oa|OpenAccess references]] * [[vlsi:workbook2:cdb2oa|Converting existing libraries from CDB to OA]] * [[vlsi:workbook2:techfile|Understanding technology files]] * [[vlsi:workbook2:config|Creating config views for testbenches and post-layout simulations]] * [[vlsi:workbook2:liberty|Writing a liberty file for the analog Front-End]] * [[vlsi:workbook2:calibre|Scripting with Calibre DRC/LVS/RCX]] * [[vlsi:workbook2:gatelevel|Gate-level simulations (with SDF back annotation)]] * [[vlsi:workbook2:makefiles|Using Makefiles (Cadence Incisive, RTL Compiler, EDI)]] * [[vlsi:workbook2:pads|PADs insertion with Encounter]] * [[vlsi:workbook2:ghdl|VHDL simulation using GHDL compiler/simulator]] * [[vlsi:workbook2:gtkwave|GTKWave]] * [[vlsi:workbook2:cdsenv|List of most important Cadence environment variables]] * [[vlsi:workbook2:sdc|Synopsys Design Constaints (SDC)]] * [[vlsi:workbook2:sdf|Standard Delay Format (SDF) annotation and simulation]] * [[vlsi:workbook2:signoff|Sign-Off]] * [[vlsi:workbook2:clksyn|Multiple clock synthesis]] * [[vlsi:workbook2:gdsinout|Importing and exporting GDS]] * [[vlsi:workbook2:lefinout|Importing and exporting LEF/DEF]] * [[vlsi:workbook2:mapfile|Understanding map files]] * [[vlsi:workbook2:tapeout|Tapeout procedures]] * [[vlsi:workbook2:vcp|Automated Digital Block Implementation using Virtuoso]] * [[vlsi:workbook2:vsr|Automated mixed-signal routing using Virtuoso Space-Based Router (VSR)]] * [[vlsi:workbook2:liberate|Library characterization using Virtuoso Liberate]] ====== ====== \\ ---- Last update: [[pacher@NOSPAMto.infn.it|Luca Pacher]] - Sep 16, 2014 ~~NOTOC~~