====== Glossary ======

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[ __[[vlsi:workbook:glossary#a|A]]__ ]
[ __[[vlsi:workbook:glossary#b|B]]__ ]
[ __[[vlsi:workbook:glossary#c|C]]__ ]
[ __[[vlsi:workbook:glossary#d|D]]__ ]
[ __[[vlsi:workbook:glossary#e|E]]__ ]
[ __[[vlsi:workbook:glossary#f|F]]__ ]
[ __[[vlsi:workbook:glossary#g|G]]__ ]
[ __[[vlsi:workbook:glossary#h|H]]__ ]
[ __[[vlsi:workbook:glossary#i|I]]__ ]
[ __[[vlsi:workbook:glossary#j|J]]__ ]
[ __[[vlsi:workbook:glossary#k|K]]__ ]
[ __[[vlsi:workbook:glossary#l|L]]__ ]
[ __[[vlsi:workbook:glossary#m|M]]__ ]
[ __[[vlsi:workbook:glossary#n|N]]__ ]
[ __[[vlsi:workbook:glossary#o|O]]__ ]
[ __[[vlsi:workbook:glossary#p|P]]__ ]
[ __[[vlsi:workbook:glossary#q|Q]]__ ]
[ __[[vlsi:workbook:glossary#r|R]]__ ]
[ __[[vlsi:workbook:glossary#s|S]]__ ]
[ __[[vlsi:workbook:glossary#t|T]]__ ]
[ __[[vlsi:workbook:glossary#u|U]]__ ]
[ __[[vlsi:workbook:glossary#v|V]]__ ]
[ __[[vlsi:workbook:glossary#w|W]]__ ]
[ __[[vlsi:workbook:glossary#x|X]]__ ]
[ __[[vlsi:workbook:glossary#y|Y]]__ ]
[ __[[vlsi:workbook:glossary#z|Z]]__ ]













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The following glossary is a reference document for information and explanations of acronyms and common 
terms related to VLSI IC design and Cadence softwares.
Be aware that this page is continuously being updated with new acronyms and improved definitions and concepts.

====== ======

In addition to the following list you can also check these useful sites for acronyms:

  * [[http://www.elexp.com/t_acron.htm|Commonly Used Acronyms (Electronix Express)]]
  * [[http://www.interfacebus.com/Engineering_Acronyms.html|Electronic Engineering Abbreviations, Acronyms]]
  * [[http://www.smta.org/files/acronym_glossary.pdf|Glossary of Acronyms Relevant to Electronics Manufacturing]]
  * [[http://www.acronym-guide.com/technology-acronyms.php|Technology, Electronics & Video Game Acronyms]]
  * [[http://www.vlsiencyclopedia.com/p/vlsi-glossary.html|VLSI Glossary (VLSI-encyclopedia)]]

===== A =====

**AC** - Alternating Current

**ac** - (//Spectre//) AC analysis

**ADC** - Analog-to-Digital Converter

**ADE** - (//Virtuoso//) Analog Design Environment

**aka** - short for //also known as//

**ALICE** - (//CERN//) A Large Ion Collider Experiment

**AMS** - (//vendor//) [[ http://www.ams.com | American MicroSemiconductors]] (ex. Austria Micro Systems) 

**AOB** - Any Other Business

**APD** - Avalanche Photo Diode 

**APS** - (//Spectre//) Accelerated Parallel Simulator

**<nowiki>ASCII</nowiki>** - American Standard Code for Information Interchange

**ASIC** - Application Specific Integrated Circuit

**ASK** - Amplitude-shift keying 

**<nowiki>ASP</nowiki>** - Analog Signal Processing

**ASSET** -   Advanced Support System for Emulation and Test

**Assura** - //Cadence//'s layout verification tool

**ATE** - Automatic Test Equipment

**ATG** - Automatic Test Generation

**ATPG** - Automatic Test-Pattern Generation

===== B =====


**BEOL** - Back-End Of Line

**BiCMOS** - Bipolar Complementary Metal Oxide Semiconductor

**BIFET** - Bipolar Field-Effect Transistor

**BIST** - Built-In Self-Test

**BIT** - Built-In Test

**bit** - binary digit

**BJT** - Bipolar Junction Transistor

**BL** - Base-Line

**BLH** - Base-Line Holder

**BNF** - Backus-Naur Form

**BOM** - Bill Of Material

**bpi** - bits per inch (HD drive)

**Bpi** - byte per inch (HD drive)

**BW** - Band-Width

**BX** - Bunch Crossing

**byte** - 8 bits (1B = 8b)

===== C =====

**CAD** - Computer Aided Design

**CAE** - Computer-Aided Engineering

**Calibre** - //Mentor Graphics//'s layout verification tool

**CCO** - Current-Controlled Oscillator

**CCR** - Cadence Change Request

**CDK** - Cadence Design Kit

**CCCS** - Current Controlled Current Source

**CCVS** - Current Controlled Voltage Source

**CDE** - Common Desktop Environment

**CDF** - (//Cadence//) Component Description Format

**CFD** - Constant Fraction Discriminator

**CIW** - (//Cadence//) Command Interpreter Window

**CLK** - Clock 

**CLM** - Channel Length Modulation (MOS short channel effect)

**CM** - Common Mode

**CML** - Current-Mode Logic

**CMFB** - Common Mode Feedback

**CMOS** - Complementary MOS

**CMRR** - Common Mode Rejection Ratio

**<nowiki>CMS</nowiki>** - (//CERN//) Compact Muon Solenoid experiment

**corner** - a combination of variables and parameters that defines a best/worst case scenario

**CPC** - Charge-Pump Circuit

**crumb** - 2 bits

**CSV** - (//file ext.//) Comma-Separated Values

**CT** - Continuous Time

**CTS** - Clock Tree Synthesis

**<nowiki>CVS</nowiki>** - Concurrent Versioning System

**C2MOS** - Clocked CMOS

===== D =====

**ΔΣ** - Delta-Sigma modulator

**DAC** - Digital-to-Analog Converter

**DAQ** - Data Acquisition

**DB** - DataBase

**dB** - (//unit//) decibel

**DC** - Direct Current

**DC-OP** - DC Operating Point

**dc** - (//Spectre//) DC analysis

**dcmatch** - (//Spectre//) ???? analysis

**deckle** - 10 bits

**DEF** - (//Cadence//) Design-Exchange Format

**DDS** - Direct Digital Synthesis

**D-FF** - Delay Flip-Flop (D-type Flip-Flop)

**DFII** - (//Cadence//) Design Framework II

**DFM** - Design For Manufacturing 

**DFT** - Design for Test

**DIBL** - Drain Induces Barrier Lowering (MOS short channel effect)

**Diva** - //Cadence//'s layout verification tool

**DLL** - Delay-Locked Loop

**DNL** - Differential Non-Linearity

**DNW** - Deep N-Well

**DRAM** - Dynamic RAM (Random Access Memory)

**DRC** - Design Rule Check

**DRM** - Design Rules Manual

**DSM** - Deep Sub-Micron

**DSP** - Digital Signal Processing

**DT** - Discrete Time

**DTL** - Diode-Transistor Logic

**DUT** - Device Under Test

**dynner** - 32 bits

**DUV** - Device Under Verification


===== E =====

**EAROM** - Eletrically Alterable Read Only Memory

**ECL** - Emitter-coupled logic

**EDA** - Electronic Design Automation

**EDI** - (//Cadence//) Encounter Digital Implementation

**EDP** - Energy-Delay Product

**ELT** - Enclosed Layout Transistor

**ENC** - Equivalent Noise Charge

**Encounter** - (//Cadence//) Place & Route tool

**ENOB** - Effective Number Of Bits

**envlp** - (//Spectre//) envelope analysis

**EOC** - End-Of-Column

**EOF** - End-Of-File

**EP** - (//fabrication service provider//) [[ http://www.europractice.com | Euro Practice]]

**EPROM** - Erasable Programmable Read Only Memory

**EEPROM** (or **E²PROM**) - Electrically Erasable Programmable Read-Only Memory

**ERC** - Electrical Rule Check

**ESD** - Electrostatic Discharge

**ETP** - Energy-Time Product

**ETBC** - Embedded Test-Bus Controller

===== F =====

**FDK** - Foundry Design Kit

**FEE** - Front-End Electronics

**FEOL** - Front-End Of Line

**FET** - Field Effect Transistor

**FF** - Flip-Flop

**FF** - (//corner//) Fast NMOS, Fast PMOS

**FFT** - (//DFT algorithm//) Fast Fourier Transform

**FIFO** - First In First Out

**FIR** - (//digital filters//) Finite Impulse Response 

**FM** -  Frequency Modulation

**FOM** - Figure Of Merit

**FOX** - (//process//) Field-Oxide

**FPAA** - Filed Programmable Analog Array

**FPGA** - Field Programmable Gate Array

**FS** - (//corner//) Fast NMOS, Slow PMOS

**FSK** - Frequency-shift keying 

**FSM** - Finite-State-Machine

**FTE** - [[http://en.wikipedia.org/wiki/Full-time_equivalent|Full-Time Equivalent]]

===== G =====

**GBP** - same as **GBW**

**GBT** - GigaBit Transceiver

**GBW** - [[ http://en.wikipedia.org/wiki/Gain–bandwidth_product | Gain-Banwidth product ]]

**GBWP** - same as **GBW**

**GDSII** - Graphic Database System II

**GIDL** - Gate-Induced Drain Leakage current

**<nowiki>GUI</nowiki>** - Graphical User Interface

===== H =====

**HCM** - (//ClioSoft//) Hardware Configuration Management

**HDL** - Hardware Description Language

**HEP** - High Energy Physics

**Hercule** - //Synopsys//'s layout verification tool 


**HF** - (//Cadence//) Hot Fix

**HSDL** - Hierarchical Scan Description Language

**HSPICE** - //Mentor Graphics//'s circuit simulator

**HV** - High Voltage

**HVT** - High threshold voltage MOS transistor

**HW** - Hardware

===== I =====

**IBM** - (//vendor//) [[ http://www.ibm.com | International Business Machines Corporation]]

**IC** - Integrated Circuit

**IC** - Inversion Coefficient

**icfb** - (//Cadence//) IC Front-to-Back

**ICMR** - Input Common-Mode Range

**IEEE** - Institute of Electrical and Electronics Engineers

**IGFET** - Insulated-Gate Field Effect Transistor

**IIR** - (//digital filter//) Infinite Impulse Response

**INL** - Integrated Non-Linearity

**IO** - Input/Output

**IOS** - Input Offset Storage (//offset cancellation technique//)

**IP** - Intellectual Property

**IP address** - Internet Protocol address

**ISI** - Inter-symbol interference

**<nowiki>ISP</nowiki>** - In-System Programming

===== J =====

**JEDEC** - Joint Electronic Device Engineering Council

**JIT** - Just-In-Time (//manufacturing//)

**JK-FF** - Jack Kilby Flip-Flop

**JTAG** -  Joint Test Action Group

===== K =====

**KCL** - Kirchoff's Current Law

**KVL** - Kirchoff's Voltage Law

===== L =====

**LDO** - Low Drop-Out voltage regulator

**LEB** - LHCC Electronics Board

**LEC** - Logic Equivalence Checking (Checker)

**LED** - Light-Emitting Diode

**LEF** - (//Cadence//) Library Exchange Format

**LET** - Linear Energy Transfer (//dE/dx// ) 

**LHCC** - LHC Commette

**LHS** - Latin Hypercube Sampling (MC algorithm)

**LIFO** - Last Input First Output

**LM** - (//Cadence//) Library Manager

**LNA** - Low-Noise Amplifier

**LOCOS** - (//process//) Local Oxidation of Silicon

**LP** - Low-Power

**LVDS** - Low-Voltage Differential Signaling

**LV** - Low Voltage

**LVS** - Layout Versus Schematic check

**LVT** - Low threshold voltage MOS transistor

**LSB** - Least Significant Bit

**LSW** - (//Cadence//) Layer Selection Window

===== M =====

**MC** - Monte Carlo

**<nowiki>MS</nowiki>** - Metal Stack

**<nowiki>MS</nowiki>** - Mixed-Signal

**MI** - Moderate Inversion

**MIM** - Metal-Insulator-Metal capacitor

**MIP** - Minimum Ionizing Particle

**MOM** - Metal-Oxide-Metal capacitor

**MOS** - Metal-Oxide-Semiconductor

**MOSIS** - (//fabrication service provider//) [[http://www.mosis.com | Metal Oxide Silicon Implementation Service]]

**MOSFET** - Metal-Oxide-Semiconductor Field Effect Transistor

**MMSIM** - (//Cadence//) Multi-Mode Simulation

**MPC** - Multi-Project Chip

**MPW** - Multi-Project Wafer

**MSB** - Most Significant Bit

**MUX** - Multiplexer

**MVA** - Multivariate Analysis 

===== N =====

**N/A** - Not applicable (or not available)

**nch** - NMOS transistor

**NDA** - Non-Disclosure Agreement

**nfet** - NMOS transistor

**nibble** - (also //nybble//) 4 bits

**nickle** - 5 bits

**NIM** - Nuclear and Instrument Methods

**noise** - (//Spectre//) noise analysis

**NM** - Noise Margin

**NTF** - Noise Transfer Function



===== O =====

**OCEAN** - (//Cadence//) Open Command Environment for Analysis

**OOS** - Output Offset Storage (//offset cancellation technique//)

**OP-AMP** - [[ http://en.wikipedia.org/wiki/Operational_amplifier | Operational Amplifier ]]

**<nowiki>OS</nowiki>** - Operating System

**OSR** - Over Sampling Ratio

**<nowiki>OSS</nowiki>** - (//Cadence//) Open Simulation System

**OTA** - Operational Transconductance Amplifier

**OTPROM** - One-Time Programmable Read-Only Memory

===== P =====

**pac** - (//Spectre//) periodic AC analysis

**PCB** - Printed Circuit Board

**PCD** - Pre-Characterized Device

**pch** - PMOS transistor

**<nowiki>PDF</nowiki>** - Probability Density Function

**PDK** - [[ http://en.wikipedia.org/wiki/Process_design_kit | Process Design Kit ]]

**PD** - Phase Detector

**PDP** - Power-Delay Product

**PET** - Positron Emission Tomography

**pfet** - PMOS transistor

**PFD** - Phase-Frequency Detector

**PLC** - Programmable Logic Controller

**PLD** - Programmable Logic Device

**PLL** Phase-Locked Loop

**PM** - Phase Margin

**PMT** - Photo-Multiplier Tube

**pnoise** - (//Spectre//) periodic noise analysis

**PROM** - Programmable Read Only Memory

**PRPG** - Pseudorandom Pattern Generation

**PSA** -  Parallel Signature Analysis

**PSD** - Power Spectrum Density

**PSF** - (//Cadence//) Parameter Storage Format

**PSI** - [[ http://www.psi.ch | Paul Sherrer Institute  ]]

**psp** - (//Spectre//) periodic [[ http://en.wikipedia.org/wiki/Scattering_parameters | S-parameters]] (Scattering) analysis

**PSRR** - Power Supply Rejection Ratio

**pss** - (//Spectre//) periodic steady-state analysis

**pstb** - (//Spectre//) periodic ????? analysis

**PTAT** - Proportional To Absolute Temperature

**PU** - Pile-Up

**PUC** - Pixel Unit Cell

**PVT** - Process, Voltage (supply) and Temperature variations

**PWB** -  Printed Wiring Board

**pxf** - (//Spectre//) periodic transfer function analysis

**pz** - (//Spectre//) pole-zero analysis

===== Q =====

**qpac** - (//Spectre//) quasi-periodic AC analysis

**qpnoise** - (//Spectre//) quasi-periodic noise analysis

**qpss** - (//Spectre//) quasi-periodic steady-state analysis

**qpsp** - (//Spectre//) quasi-periodic S-parameters (Scattering) analysis

**qpxf** - (//Spectre//) quasi-periodic transfer function analysis

===== R =====

**<nowiki>RAID</nowiki>** - Redundant Array of Inexpensive Disks

**RAM** - Random Access Memory

**RB** - Replica Bias

**RC** - (//Cadence//) RTL Compiler, digital syntesis tool

**RCX** - Resistor-Capacitor extractor

**//R&D//** - Research and Development

**<nowiki>RDF</nowiki>** - Random Dopant Fluctuations

**RHEL** - Red Hat Enterprise Linux

**ROC** - Read-Out Chip

**ROI** - Region Of Interest 

**ROM** - Read Only Memory

**RF** - Radio Frequency

**RMS** - Root Mean Square

**RSF** - (//Cadence Assura//) Run-Specific File

**RTL** - Register Transfer Level

**RTL** - Resistor-transistor logic

**RVE** - (//Calibre//) Results Viewing Environment

===== S =====

**SADD** - Start Address

**SAW** - Surface acoustic wave

**SDD** - Silicon Drift Detector

**SBD** - Schottky Barrier Diode

**SCEs** - Short Channel Effects

**SCL** - Source-Coupled Logic

**SE** - (//Cadence//) Schematic Editor

**SEE** - Single Event Effect

**SEB** - Single Event Burnout

**SEGR** - Single Event Gate Rupture

**SEL** - Single Event Latchup

**sens** - (//Spectre//) sensitivity analysis

**SEU** - Single Event Upset

**SF** - (//corner//) Slow NMOS, Fast PMOS

**SFDR** - Spurious Free Dynamic Range

**SI** - Strong Inversion

**SiPM** - Silicon Photo-Multiplier

**SKILL** - //Cadence//'s scripting language

**SL** - Scientific Linux

**SLC** - Scientific Linux Cern

**SMD** - Surface Mount Device (PCB design)

**SNR** - Signal-to-Noise Ratio

**SNDR** - Signal-to-Noise and -Distortion Ratio

**SoC** - System on Chip

**SOI** - (//process//) Silicon On Insulator

**sp** - (//Spectre//) [[ http://en.wikipedia.org/wiki/Scattering_parameters | S-parameters ]] (Scattering) analysis

**SPB** - (//Cadence//) Silicon Package Board, PCB design tool

**Spectre** - //Cadence//'s circuit simulator

**SPICE** - [[ http://en.wikipedia.org/wiki/SPICE | Simulation Program with Integrated Circuits Emphasis ]]

**SR** - (//amplifier//) [[ http://en.wikipedia.org/wiki/Slew_rate | Slew Rate ]]

**SRAM** - Static Random Access Memory

**SS** - (//corner//) Slow NMOS, Slow PMOS

**stb** - (//Spectre//) ???? analysis

**STF** - Signal Transfer Function

**STI** - (//process//) Shallow Trench Isolation 

**SVRF** - (//Calibre//) Standard Verification Rule Format

**SW** - Software

===== T =====

**TC** - Temperature Coefficient

**TBD** - To Be Determined

**TCL** - (//scripting language//) Tool Command Language

**TDC** - Time-to-Digital Converter

**TOA** - Time Of Arrival

**TOF** - Time Of Flight

**TOT** - Time-Over-Threshold

**TG** - Transmission Gate

**TID** - Total Ionizing Dose (Total Irradiated Dose)

**tran** - transient analysis

**TSMC** - (//vendor//) [[ http://www.tsmc.com | Taiwan Semiconductor Manufacturing Company]]

**TT** - (//corner//) Typical NMOS, Typical PMOS

**TTL** - Transistor-transistor logic

**TVF** - (//Calibre//) TCL Verification Format

**tw** - triple-well transistor

**tydbit** - (also //tayste//) 2 bits

===== U =====

**UBT** -  Universal Bus Transceiver

**UDSM** - Ultra-Deep-Sub-Micron technology

**ULP** - Ultra Low-Power

**UMC** - (//vendor//) [[ http://www.umc.com | United Microelectronics Corporation]]

**USB** - Universal Serial Bus

**UTM** - (//metal stack//) Ultra-Thick Metal

**UUT** -  Unit Under Test

**UVM** - Universal Verification Methodology


===== V =====

**VCCS** - Voltage-Controlled Current Source

**VCO** - Voltage-Controlled Oscillator

**VCVS** - Voltage-Controlled Voltage Source

**VHDL** - VHSIC Hardware Description Language

**VHSIC** - Very High Speed Integrated Circuits

**ViVA** - (//Cadence//) Virtuoso Visualization and Analysis

**VLSI** - Very Large Scale Integration

**VTC** - Voltage Transfer Characteristic

===== W =====

**WI** - Weak Inversion 

**WPE** - Well Proximity Effects

**wrt** - short for //with reference to//

===== X =====

**xf** - (//Spectre//) transfer function analysis

**XOR** - Exclusive OR logic gate

**XCVR** - Transceiver

===== Y =====

===== Z =====

**ZDC** - Zero Degree Calorimeter


====== ======

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Last update: [[panati@NOSPAMto.infn.it|Serena Panati]] - Sep 19th, 2013 

~~NOTOC~~