====== Power Analysis ======

The Cadence tools for synthesis deliver a possibility to estimate the power consumption with the used technology. It takes an estimate for the switching activities as an input and sums up the consumption of all the components. Of course, it works best if you give a realistic input for these switching activities, otherwise the tool will estimate from some default values. At the end, you get a power report summarizing the estimated power consumption.


===== Export the Switching Activities =====

Switching activities are saved in the Toggle Count Format (TCF), a Cadence standard describing the switching for each pin/net in the design. In order to get such a file, you need a test bench that simulates the behaviour of your design. After loading it in SimVision (''ncsim''), you have to execute the **''dumptcf''** command in the console window, which is available in SimVision. If you don't have it already opened, go to ''Windows'' -> ''Tools'' -> ''Console''.

Then you should run the following series of commands to get the TCF file. But make sure to adjust the scope ('':top_level_instance'') and output file name (''OutputFile.tcf'') to your project.

<code>dumptcf -scope :top_level_instance -output OutputFile.tcf -flatformat -override
run 10 us
dumptcf -end</code>

This runs the simulation for ten micro seconds (other units would be ns or ms) with the settings for the TCF dump given with the first command. After running the dumping process is stopped. Unfortunately there is no output inside the console, but if it looked a bit like this, it should be fine:

{{:vlsi:workbook:digital:syn:generate_tcf_with_simvision_console.png|Running the dumptcf command in the SimVision console window.}}

//**More:** The relevant chapter in the Cadence help library is "Generating TCF Files from a VHDL-Based Design and VHDL Testbench".//


===== Including TCF in Synthesis =====

Including this into your synthesis is rathes easy. You just have to add some commands into your scripts.

==== Options for Power Analysis ====

Add these commands in your initialization, before any actual work is done:

<code>set_attribute lp_power_analysis_effort high /
set_attribute lp_power_unit uW /</code>

  * The first command sets the accuracy for the power analysis to high. It means spending more computing time and memory on getting the numbers right, but the result will be more accurate. All possibilities are: ''high'', ''medium'', ''low''.\\
  * The second command sets the unit for diplaying power values to microvolts. All possibilities are: ''pW'', ''nW'', ''uW'', ''mW''.

//**More:** See "Low Power Synthesis" -> "Root Attributes" in the Cadence help library.//

==== Do the Actual Analysis ====

The following command reads the TCF as an input for the switching activities:

<code>read_tcf path/to/OutputFile.tcf</code>

Put it before the first ''synthesize'' excecution in the scripts. In my case this is in the ''ProjectName_syn.tcl'' file.


==== Get the Power Report ====

If you want to have the power report written to a file, you should include this line at the end of your scripts, at least after all the ''synthesize'' steps are done.

<code>report power -depth 3 > final_power.rpt</code>

You can change (or remove) the ''-depth'' parameter and adjust the filename. If you just want a quick look at the report, remove the part starting with '>' and enter it inside the command line from Encounter.

=== Example Report ===
An example for such a power report is shown here:

<code>                               Leakage   Dynamic    Total   
        Instance        Cells Power(uW) Power(uW) Power(uW) 
------------------------------------------------------------
inst_TOP_LEVEL            237     0.136    37.791    37.927 
  inst_MODULE1             86     0.053    15.044    15.097 
  inst_MODULE2             63     0.048    15.530    15.579 
    inst_submodule21       22     0.015     6.504     6.519 
    inst_submodule22       10     0.007     0.801     0.808 
    inst_submodule23       10     0.006     0.850     0.856 
  inst_MODULE3             51     0.023     1.815     1.838 
    inst_submodule31       16     0.007     0.488     0.495 
    inst_submodule32       16     0.007     0.488     0.495 
</code>