====== Build a standard cell library from scratch ====== [ __[[vlsi:home|Home]]__ ] [ __[[vlsi:workbook:digital|Back]]__ ] [ __[[vlsi:workbook|Design WorkBook]]__ ] Probabilmente l'esercizio piu' costruttivo che uno possa fare! C'e' praticamente tutto! Full-custom in Virtuoso, abstract generation, liberty file description! References (just google for 'standard cell tutorial'): [[http://www.csee.umbc.edu/~cpatel2/links/641/|Advanced VLSI Design II course (by C. Patel)]] Textbook: \\ //Digital VLSI Chip Design with Cadence and Synopsys CAD Tools// \\ by E. Brunvand \\ [[http://www.cs.utah.edu/~elb/cadbook/]] [[http://ece451web.groups.et.byu.net/cadence-help/src/tlf.pdf]] \\ [[http://www.ece.unm.edu/~jimp/vlsi_synthesis/contrib/MissStateStdCellTut.ppt‎]] \\ [[http://www.silvaco.com/products/digital_cad/cell_characterization_modeling/Cell_Char_Intro.pdf]] \\ [[http://www.ece.unm.edu/~jimp/vlsi_synthesis/]] \\ [[http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee241_s13/Assignments/lab3-stdcell.pdf]] \\ [[http://www.csee.umbc.edu/~cpatel2/links/641/slides/lect02_std_cells.pdf‎]] Everything in: [[http://www.cse.sc.edu/~jbakos/612/index.shtml]] ====== Liberty ====== [[http://www.csee.umbc.edu/~cpatel2/links/641/slides/lect05_LIB.pdf]] ====== Abstract generation ====== [[http://www.cse.sc.edu/~jbakos/612/index.shtml]] \\ [[http://www.cse.sc.edu/~jbakos/612/tutorials/scells_abstract.shtml]] ====== ====== \\ ---- Last update: ~~NOTOC~~