====== Analog IC design HowTo's ======

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== Contents ==

   * [[vlsi:workbook:analog:howtos#introduction|Introduction]] 
   * [[vlsi:workbook:analog:howtos#how_to_disable_the_annoying_beep_sound|How to disable the annoying 'beep' sound]]
   * [[vlsi:workbook:analog:howtos#how_to_evaluate_the_power_consumption|How to evaluate the power consumption]]
   * [[vlsi:workbook:analog:howtos#how_to_evaluate_the_total_impedance_at_a_node|How to evaluate the total impedance at a node]]
   * ....

**Keywords:**

===== Introduction =====



====== How to change the default simulation results and saved states directories ======

By default, all **simulation data and results** are stored in a ''~/simulation'' directory automatically created
in your home directory the first time you run a simulation with Cadence IC.
Similarly, Cadence **simulation states** by default are saved in a ''~/.artist_states'' hidden directoryautomatically created
in your home directory.

To change these defaults, just use in your home ''~/.cdsinit'' or ''~/.cdsinit_personal'' files the following directives:


<code>
envSetVal("asimenv.startup" "projectDir" 'string "/path/to/your/custom/simulation/results/directory")
envSetVal("asimenv" "saveDir" 'string "/path/to/your/custom/simulation/states/directory")
</code>

\\
You can also issue these statements at the CIW command prompt.

\\
See also

[[http://www.cadence.com/Community/forums/p/17009/1179512.aspx]]


===== How to disable the annoying 'beep' sound =====

Solo pe rla sessione corrente:

**CIW => Options => User Preferences...** 

poi nel Command Controls tab c'e' la Beep Volume section


Altrimenti si customizza l'environment editanto il **.cdsinit**


===== How to evaluate the power consumption =====

A detailed Wiki page about this topic has been created, please refer to 
__[[vlsi:analog_power_sim|Power consumption evaluation in Cadence]]__.

===== How to use SPICE transistor models =====

===== How to define the default circuit simulator for ADE =====
To set the default simulator, e.g. as Spectre, enter the following environment variable
 in your .cdsenv or .cdsinit file.
 Syntax to set the default simulator in the .cdsenv

<code>
asimenv.startup simulator string "spectre"
</code>

Syntax to set the default simualtor in the .cdsinit
<code>
envSetVal("asimenv.startup" "simulator" 'string "spectre")
</code>

===== How to set the default models path for Spectre =====
Syntax to set the default model path in the .cdsenv

<code>
spectre.envOpts modelPath string "<pathTo>/myModelFile;section"
</code>

Syntax to set the default model path in the .cdsinit

<code>
envSetVal("spectre.envOpts" "modelPath" 'string "<pathTo>/myModelFile;section")
</code>

===== Creating a parameterized cell =====


e.g. creare un ideal OPAMP with a **vcvs**


<code>
pPar("gain")
</code>

**CIW => Tools => CDF => Edit...**

see also [[ http://wikis.ece.iastate.edu/vlsi/index.php/Creating_a_Parameterized_Cell_in_Cadence | here ]]

===== How to save DC Operating Points’ Parameters of a MOSFET =====

<code>
save M0:oppoints
</code>

Other web tutorials can be found 
[[http://eda.engineering.wustl.edu/wiki/index.php/How_to_Save_DC_Operating_Points%E2%80%99_Parameters_of_a_MOSFET_in_Cadence|here]] and [[ http://www.eecs.tufts.edu/~ryun01/gmid_ruida.pdf | here ]]

===== How to evaluate rise time, delays etc. =====


<code>
riseTime(.....)
</code>

<code>
delay(......)
</code>


Example: Time-over-Threshold



===== How to make nice looking plots from Cadence =====

===== Printing the schematic =====

===== How to draw diagonal wires =====

This is a very useful trick to make your schematics more readable. 
Diagonal connections are used to draw **cross-coupled transistors** as 
in //latches// and //flip-flops//.


{{:vlsi:draw_diagonal_wires.png}}



Press **W** to begin wiring, then press the **F3** key. The //Add Wire// window will appear. 

{{:vlsi:f3_add_wire.png}}

Change the **Draw Mode** from the default of "route" to something that allows diagonal or any angle wires.


{{:vlsi:f3_add_wire_diagonal.png}}




You can also specify a 45 degree fixed angle with the relative //Lock Angle// option.



But you can also change between different Draw Modes simply by clicking on the mouse whell 
or the central mouse button!


See also 

[[http://www.cadence.com/Community/forums/p/16772/1178636.aspx]]

===== Performing simulations with HSPICE =====

Se e' installato

see also [[ http://www.eda.ncsu.edu/wiki/Tutorial:Analog_Artist_with_HSPICE | here ]]


===== How to evaluate the total impedance at a node =====


A detailed Wiki page about this topic has been created, please refer to
__[[vlsi:workbook:analog:howtos:node_impedance_sim|Node impedance simulation]]__.


===== How to evaluate the total input/output capacitance of a stage =====

In ingresso tipicamente e' quella vista sul gate of the **input transistor**

<code>
OP("/M0","cgg")
</code> 



===== How to measure the OPAMP slew-rate =====

Si applica la definizione, mando in ingresso un voltage step
e misuro 


SR = max{//d v<sub>out</sub> / dt// }


<code>
ymax(deriv(VT("/out")))
</code>

===== How to choose the proper number of fingers =====

in potenze di 2, as Manuel dixit?


===== Create a custom library of ideal building blocks =====

<code>
cd ~/cadence
mkdir ideal_blocks
cd ideal_blocks
mkdir idealLib
</code>

poi create a cds.lib with the following directives:


<code>
INCLUDE $IC_DIR/tools/dfII/local/cds.lib
DEFINE idealLib $HOME/cadence/ideal_blocks/idealLib
</code>

poi lanciare virtuoso normalmente



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Last update: [[pacher@NOSPAMto.infn.it|Luca Pacher]] - Apr 23, 2013
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