{{ :vlsi:workinprogress.png?100}} ====== Part II - Analog and mixed-mode IC design ====== [ __[[vlsi:home|Home]]__ ] [ __[[vlsi:workbook|Back]]__ ] [ __[[vlsi:workbook|Design WorkBook]]__ ] [ __[[vlsi:workbook:analog#contents|Contents]]__ ] [ __[[vlsi:workbook:analog:webtutorials|Third party tutorials]]__ ] [ __[[vlsi:workbook:analog:youtube|Videos]]__ ] [ __[[vlsi:resources:books|Books]]__ ] [ __[[vlsi:workbook:glossary|Glossary]]__ ] [ __[[vlsi:workbook:analog:howtos|HowTo's]]__ ] [ __[[vlsi:workbook:analog:faqs|FAQs]]__ ] [ __[[vlsi:workbook:analog:kpas|Known problems and solutions]]__ ] \\ The second part of the WorkBook... **technology-independent tutorials** vanilla environment setups simple SPICE model files that can be downloaded without restrictions from the Web Although layout exercises have been run attached to a specific technology, no technology references will be included in the tutorials description. As a matter of fact we mention a few very standard layers (e.g. M1 and M2 metal layers) which are common to all technologies. Layout examples with the **[[http://www.layouteditor.net/|LayoutEditor]]** open source software extract a simple **sandwitch metal-to-metal capacitor**, which is another technology-independent example To get started with SPICE you can refere to __[[vlsi:workbook:analog:ltspice|LTspice pages]]__ A collection of questions abaout analog design with Cadence has been collected in form of __[[vlsi:workbook:analog:howtos|HowTo's]]__ and __[[vlsi:workbook:analog:faqs|FAQs]]__. == Contents == * **[[vlsi:workbook:analog:start|Getting started]]** * Introduction * Tools overview * Reference documentation * Setting up the UNIX evironment * Running Cadence Virtuoso * Quitting the session * **[[vlsi:workbook:analog:infrastructure|Analog design infrastructure]]** * Introduction * Technology files, libraries, LEF/DEF etc. * **[[vlsi:workbook:analog:hierarchy|Design hierarchy]]** * Introduction * Libraries * The ''cds.lib'' file * Cells * Cell views * Using the Library Manager * Creating a new library * Creating a new cell * Opening an existing cell * Copying and deleting * Managing libraries with the Library Path Editor * **[[vlsi:workbook:analog:cdsenv|Cadence environment and setup files]]** * [[vlsi:workbook:analog:cdsenv#introduction|Introduction]] * [[vlsi:workbook:analog:cdsenv#reference_documentation|Reference documentation]] * [[vlsi:workbook:analog:cdsenv#sample_files|Sample files]] * [[vlsi:workbook:analog:cdsenv#.cadence_directories|.cadence directories]] * [[vlsi:workbook:analog:cdsenv#.cdsenv_and_.cdsinit_initialization_files|.cdsenv and .cdsinit initialization files]] * [[vlsi:workbook:analog:cdsenv#.cdsinit_tech|.cdsinit_tech]] * [[vlsi:workbook:analog:cdsenv#libinit.il|libInit.il]] * [[vlsi:workbook:analog:cdsenv#cds.log|CDS.log]] * [[vlsi:workbook:analog:cdsenv#.simrc|.simrc]] * [[vlsi:workbook:analog:cdsenv#.cdsplotinit|.cdsplotinit]] * [[vlsi:workbook:analog:cdsenv#cds.lib_library_definition_file|cds.lib library definition file]] * [[vlsi:workbook:analog:cdsenv#display.drf|display.drf]] * [[vlsi:workbook:analog:cdsenv#bindkeys|Bindkeys]] * [[vlsi:workbook:analog:cdsenv#some_customization_examples|Some customization examples]] * **[[vlsi:workbook:analog:tutorials|Basic analog design tutorials]]** * Introduction * Environment setup * Tutorial 1 - Basic NMOS characteristics * Tutorial 2 - Common-source amplifier * Tutorial 3 - The CMOS inverter * Tutorial 4 - A two stage OPAMP with Miller compensation * Tutorial 5 - ... * Tutorial 6 - ... * [[vlsi:analog_schematic_tutorials#third_party_video_tutorials|Third party video tutorials]] * **[[vlsi:workbook:analog:schemref|Schematic-entry references]]** * Introduction * .... * Iterated instances (vectors) * ... * ... * **[[vlsi:workbook:analog:simref|Simulation references]]** * [[vlsi:analog_simref#introduction|Introduction]] * [[vlsi:analog_simref#reference_documentation|Reference documentation]] * [[vlsi:analog_simref#dc_operating_points|DC operating points]] * [[vlsi:analog_simref#power_consumption_evaluation|Power consumption evaluation]] * [[vlsi:analog_simref#ADE_simulation_options|ADE simulation options]] * [[vlsi:analog_simref#total_input_output_impedance_simulation|Total input/output impedance simulation]] * [[vlsi:analog_simref#noise_analyses|Noise analyses]] * .... * **[[vlsi:workbook:analog:techniques|Design techniques]]** * Introduction * MOS small signal model validity * Analog design in very deep submicron technologies * Rules of thumb for transistor sizing * Some standard analog topologies * **[[vlsi:workbook:analog:bad_practices|Bad analog design practices]]** * Introduction * ... * **[[vlsi:workbook:analog:adexl|Advanced analog design simulations]]** * Introduction * Getting started with ADE XL * Reference documentation * Corner analysis * [[vlsi:analog_advancedsim#monte_carlo_simulations|Monte Carlo simulations]] * **[[vlsi:workbook:analog:doc|Include documentation in your designs]]** * Introduction * Add notes and comments to schematics * Creating text cell views * Include documentation in ADE XL * Datasheets generation * ... * **[[vlsi:workbook:analog:ocean|Running simulations using OCEAN]]** * Introduction * Reference documentation * ... * ... * **[[vlsi:workbook:mixed|Introduction to Mixed-Signal simulation with Cadence tools]]** * Introduction * ... * ... * **[[vlsi:workbook:analog:layout:intro|Layout (an introduction)]]** * Introduction * Tools overview * Reference documentation * Environment setup * Load standard bindkeys * Starting Cadence Virtuoso Layout Editor L/XL * Setting user preferences * The Layer Palette * **[[vlsi:workbook:analog:layout:tutorials|Basic layout tutorials]]** * Introduction * Create a ruler * Draw a simple metal layer * Edit objects * Merge layers * View the layer stack * Create a text label * Create a pin * **[[vlsi:workbook:analog:layout:pcells|Working with parametrized cells]]** * Introduction * Substrate contacts * NMOS layout * PMOS layout * **[[vlsi:workbook:analog:layout:techniques|Basic layout techniques]]** * Introduction * Multi-finger transistors * Common centroid layout * Latch-up * **[[vlsi:workbook:analog:layout:examples|Standard layout examples]]** * Inverter layout * Common source amplifier * NAND gate * NOR gate * Differential pair * Ring oscillator * **[[vlsi:workbook:analog:layout:pex|Post-Layout simulations]]** * Introduction * Parasitic extraction * Simulation of the extracted netlist * **[[vlsi:workbook:analog:layout:tutorials:capacitor|Full example: a parallel-plates capacitor]]** * **[[vlsi:workbook:analog:howtos|HowTo's]]** * **[[vlsi:workbook:analog:faqs|FAQs]]** **Keywords:** ====== ====== \\ ---- \\ Maintainers: [[lattuca@NOSPAMto.infn.it|Alessandra Lattuca]], [[pacher@NOSPAMto.infn.it|Luca Pacher]]\\ Last update: [[pacher@NOSPAMto.infn.it|Luca Pacher]] - Arp 10, 2013